Continuous Time Delta Sigma Modulator Automatic Timing Adjustment
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Solution Overview
Problem
High-speed continuous-time ΔΣ ADCs face non-ideal performance due to imperfect synchronization or timing between sampling and DAC update times, with existing methods either being overly restrictive or lacking a method for automatic adjustment.
Innovation Solution
A continuous time ΔΣ modulator system with automatic timing adjustment, featuring a timing measurement circuit to detect differences between ADC sampling and DAC update times, and a timing adjustment circuit to align these times using a master clock and digital logic control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If timing adjustment means are included in the circuit, then timing alignment capability is improved, but device complexity increases
Solution Approach 1:
The patent creates a simplified replica model of the feedback path that copies the essential timing characteristics without including all the complex analog circuitry. The replica contains only the critical delay elements needed to measure timing offset, avoiding the complexity of duplicating the full DAC-loop filter-DAC chain while still providing accurate timing measurement capability.
2Extent of automation
If timing measurement and adjustment circuits are added, then automatic timing alignment is achieved, but manufacturing complexity increases
Solution Approach 1:
The system automatically measures its own timing offset and adjusts its clock phases without external intervention. The timing measurement circuit continuously monitors the phase difference between ADC sampling and DAC update, and the adjustment circuit automatically compensates for detected misalignment, enabling the system to self-correct timing errors without requiring manual calibration or complex manufacturing processes.
3Reliability
If strict timing synchronization is enforced, then system performance is improved, but design difficulty increases
Solution Approach 1:
Instead of enforcing fixed, rigid timing synchronization, the patent implements dynamic timing adjustment where clock phases can be automatically modified based on measured conditions. The system adapts its timing parameters in real-time to compensate for process variations, temperature drift, and other environmental factors, maintaining optimal performance without requiring overly restrictive design constraints.
Data Source
AI summary
A continuous time ΔΣ modulation system with automatic timing adjustment includes a loop filter having continuous time elements for receiving an input; and an ADC for sampling the output from the loop filter in response to an ADC clock; a DAC responsive to the output from the ADC for feeding back an input to the loop filter in response to a DAC clock; a timing measurement circuit for detecting a difference in the timing of the ADC sampling time and the DAC update time and a timing adjustment circuit responsive to the timing measurement circuit for adjusting the timing of at least one of the DAC and ADC clocks for aligning their respective update and sampling times.