Reconfigurable DEM Circuit for DAC Mismatch Distortion

The patent implements dynamic element matching by making the mapping between binary input bits and analog elements time-varying. A pseudorandom sequence generator continuously changes the assignment of binary bits to analog elements (e.g., DAC cells), so that mismatch errors are randomized and averaged out over time. This dynamic reconfiguration mitigates the harmful effects of element mismatch while maintaining system simplicity.

The patent converts the harmful effect of analog element mismatch into a beneficial statistical averaging effect. By using pseudorandom dithering sequences to dynamically assign binary bits to analog elements, the systematic mismatch errors are transformed into random noise that can be filtered or averaged, thereby improving overall signal accuracy and reducing distortion.

The patent achieves dynamic element matching using a unified pseudorandom sequence generator that can be applied across multiple binary-to-analog conversion channels. The same dithering sequence is used to control the mapping in multiple parallel paths, allowing a single complexity source to benefit the entire converter system rather than requiring separate complex matching circuits for each element.

The patent changes the temporal parameter of the binary-to-analog mapping by introducing time-varying pseudorandom sequences. Instead of static element assignment, the system dynamically changes which binary bit controls which analog element based on the pseudorandom sequence state. This parameter change approach adds minimal circuit complexity while significantly improving signal accuracy through error randomization.