Demand Paging Big Data Accelerator Memory Management
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Solution Overview
Problem
Current big data processing technologies face challenges in managing large volumes of structured and unstructured data, leading to inefficiencies in data processing and energy consumption, particularly in corporate and web hosting data centers, where traditional methods struggle to provide the necessary performance and energy efficiency for handling massive data sets.
Innovation Solution
A demand paging system for distributed big data caching is implemented, utilizing a server node with a processor, memory, and an accelerator integrated circuit that includes a memory management unit, interface, and multiple memory types to efficiently allocate and manage virtual memory for data sets, persist data across application execution stages, and signal data page faults, thereby optimizing data processing and energy usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional data processing software is used to handle big data, then the system is simple and easy to operate, but it cannot manage large volumes of data efficiently
Solution Approach 1:
The patent segments the data processing system into multiple components: server nodes with processors, accelerators with integrated circuits, and distributed memory systems. Each component handles specific tasks, allowing the system to manage large data volumes through division of labor while maintaining manageable complexity at each level.
Solution Approach 2:
The patent implements a nested architecture where accelerators with integrated circuits are embedded within server nodes, which themselves are part of a distributed cluster. The memory hierarchy nests multiple memory types (first, second, and third memories) within the accelerator, creating layers of abstraction that enable complex data processing while shielding users from underlying complexity.
2Ease of operation
If data is continuously transferred between memory and storage, then data accessibility is improved, but energy consumption increases
Solution Approach 1:
The patent implements demand paging mechanisms that pre-load data pages into faster memory when needed, and persist data across execution stages in the third memory. This preliminary action reduces the need for frequent data transfers during processing, improving accessibility while reducing energy consumption by avoiding redundant transfers.
Solution Approach 2:
The patent creates different memory regions with different characteristics (first memory for virtual addresses, second memory for data page information, third memory for persistent storage) within the accelerator. Each memory type is optimized for its specific function, allowing efficient local access patterns that reduce energy consumption while maintaining data accessibility.
3Productivity
If virtual memory allocation is implemented for data set partitions, then memory management efficiency is improved, but system complexity increases
Solution Approach 1:
The patent introduces a memory management unit as an intermediary component within the integrated circuit that handles virtual memory allocation, address translation, and data page management. This mediator abstracts the complexity of virtual memory management from the server processor, improving memory management efficiency while isolating the complexity within a dedicated component.
4Duration of action of stationary object
If data pages are allocated in third memory corresponding to virtual pages, then data persistence across execution stages is improved, but memory resource requirements increase
Solution Approach 1:
The patent changes the state of data by persisting it across execution stages in the third memory, transforming temporary data into persistent data. This parameter change (from volatile to persistent) allows data to survive across multiple processing stages, improving duration while the selective persistence approach manages resource requirements by only persisting necessary data.
Data Source
AI summary
The system and method described features mechanisms from a big data analytics platform that provides the performance and energy benefits of integrated acceleration circuits such as field programmable gate arrays (FPGA), application specific integrated circuits (ASIC) or custom circuits without sacrificing the ease of developing applications on distributed cluster-computing frameworks like Apache Spark.