Demodulator Circuit Using Complementary Clocks and Capacitor Hold Stages
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Solution Overview
Problem
Traditional demodulators face limitations in dynamic range and are affected by large carrier ripples, which impact downstream circuits and require complex filtering.
Innovation Solution
A demodulator circuit with a sampling stage using complementary clock signals, a hold stage with capacitor circuits for signal delay, and an output stage for alternating signal coupling, along with resistors to increase dynamic range and reduce carrier ripple.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a traditional demodulator is used to demodulate a carrier signal with large amplitude, then the demodulated output amplitude is limited, but the dynamic range is insufficient
Solution Approach 1:
The demodulator is divided into multiple functional stages: a sampling stage with mixers that process the input signal, a hold stage with capacitor circuits that store and delay signals, and an output stage that alternately couples hold signals. This segmentation allows each stage to be optimized independently, enabling the system to handle both large carrier amplitudes and maintain wide dynamic range for demodulated outputs.
2Power
If a traditional demodulator processes signals with large carrier amplitude, then the carrier ripple on the output becomes large, but this causes residual carrier ripple to exceed the demodulated signal
Solution Approach 1:
The hold stage extracts and stores the demodulated signal components from the mixed signal, separating them from the carrier ripple. By holding the signal for one carrier period and then alternately coupling the held signals, the circuit effectively removes the harmful carrier ripple while preserving the demodulated information, preventing residual ripple from exceeding the signal level.
3Object-generated harmful factors
If complex filtering is employed to remove carrier ripple, then the carrier ripple is reduced, but the device complexity increases
Solution Approach 1:
The demodulator circuit performs self-filtering through its inherent timing and switching mechanism. The hold stage stores signals for exactly one carrier period, and the output stage alternately couples hold signals at the carrier frequency. This timing-based approach automatically rejects carrier ripple without requiring additional external filter components, making the circuit self-sufficient in removing harmful ripple while maintaining simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The demodulator effectively minimizes the impact of large carrier ripples and expands the dynamic range, ensuring a stable demodulated output suitable for further processing.
Implementation Method 1
at least one mixer configured to be controlled by complementary clock signals synchronous with a carrier frequency of an input signal to demodulate the input signal and generate a sampled signal
Implementation Method 2
a hold stage including at least a first capacitor circuit configured to output the sampled signal after delaying the sampled signal as a first hold signal and a second capacitor circuit configured to output the sampled signal after delaying the sampled signal as a second hold signal
Data Source
AI summary
A demodulator includes a sampling stage, a hold stage, and an output stage. The sampling stage includes at least one mixer configured to be controlled by complementary clock signals synchronous with a carrier frequency of an input signal to demodulate the input signal and generate a sampled signal. The hold stage includes at least a first capacitor circuit configured to output the sampled signal after delaying the sampled signal as a first hold signal and a second capacitor circuit configured to output the sampled signal after delaying the sampled signal as a second hold signal. The output stage is configured to alternately couple the first hold signal and the second hold signal as a demodulated output signal.