Counter-doped Drain Extension for DEMOS Transistor Breakdown
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Solution Overview
Problem
Modern digital VLSI circuits face challenges in operating at higher voltages without increasing process complexity and cost, as existing drain extended CMOS transistors suffer from performance degradation due to longer drain extensions and lower doping, which increase series resistance.
Innovation Solution
Adding scattering centers to the depletion region of drain extended CMOS transistors, either through counterdoping or implanting neutral species, reduces the mean free path of carriers, thereby increasing the breakdown voltage and reducing series resistance without compromising performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If longer drain extensions or lower doping is used to accommodate higher voltages, then breakdown voltage is increased, but series resistance increases reducing performance
Solution Approach 1:
The patent applies local quality by creating a counter-doped region with different doping characteristics within the drain extension. Specifically, a second dopant type is introduced in a portion of the drain extension to form a localized region with modified electrical properties, allowing the structure to simultaneously achieve high breakdown voltage and low series resistance through spatially differentiated doping zones
Solution Approach 2:
The patent employs composite materials by combining multiple dopant types (first and second dopants of opposite polarity) within the drain extension region. This creates a composite-doped structure where the interaction between different dopant species produces both high breakdown voltage characteristics and low series resistance, effectively resolving the contradiction between reliability and performance
2Adaptability or versatility
If two gate oxide thicknesses are used to build both low voltage and high voltage transistors, then voltage compatibility is improved, but process complexity and cost increase
Solution Approach 1:
The patent applies universality by designing a single gate oxide structure that can serve both low voltage and high voltage transistor functions. The counter-doped drain extension enables the same transistor with uniform gate oxide thickness to operate reliably across a wide voltage range, eliminating the need for separate gate oxide thicknesses and thereby reducing process complexity while maintaining voltage compatibility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for higher voltage operation while maintaining low resistance, enabling more efficient voltage handling and improved performance in CMOS transistors by raising the critical field for impact ionization and increasing the breakdown voltage.
Implementation Method 1
Adding scattering centers to the drift region of a pn diode raises the breakdown voltage. Adding scattering centers to the drift region of an extended drain (DEMOS) transistor raises the breakdown voltage.
Implementation Method 2
A depletion region forms in this lightly doped extension causing a voltage drop between the drain contact and the transistor gate.
Implementation Method 3
raising the critical field for impact ionization and increasing the breakdown voltage
Data Source
AI summary
An integrated circuit containing a diode with a drift region containing a first dopant type plus scattering centers. An integrated circuit containing a DEMOS transistor with a drift region containing a first dopant type plus scattering centers. A method for designing an integrated circuit containing a DEMOS transistor with a counter doped drift region.