DE-MOSFET Switch Biasing for High-Voltage Safe Operating Area

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Solution Overview

Problem

Semiconductor switches face reliability and functionality issues when handling high voltage signals due to the asymmetry in breakdown voltages across gate and source, and gate and drain, which can lead to operating conditions outside their safe operating area.

Innovation Solution

The use of diffusion-enhanced metal-oxide-semiconductor field effect transistors (DE-MOS FETs) with graded junctions and field oxides to create a safe operating area, allowing the switches to handle high voltages by maintaining voltages across the gate and source below the breakdown voltage, while supporting higher voltages across the drain and gate or drain and source.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional MOS FETs are used to handle high voltage signals, then the voltage handling capability is limited by the breakdown voltage asymmetry between gate-source and gate-drain, but using DE-MOS FETs with graded junctions and field oxides increases the voltage handling capability while maintaining safe operating conditions

Engineering Contradiction:
Improvesafe operating areaVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by implementing graded junctions specifically in the drain region and field oxides at critical locations where high voltage stress occurs. This localized enhancement of structural quality allows the device to handle high voltages without requiring the entire structure to be more complex, thus improving reliability while minimizing added complexity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs composite materials through the combination of graded junctions (varying doping concentrations) and field oxides within the DE-MOS FET structure. This composite approach creates regions with different electrical properties that work together to distribute and manage high voltage stresses, enabling the device to operate safely at higher voltages than conventional MOS FETs.

Inventive Principle:
Principle #40Composite materials

2Reliability

If higher voltages are applied across gate and source to increase voltage handling capability, then the voltage handling capability improves, but the breakdown voltage is exceeded causing reliability issues

Engineering Contradiction:
Improvevoltage handling capabilityVSAvoidbreakdown voltage violation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies beforehand cushioning by incorporating field oxides and graded junctions in advance to create protective regions that prevent voltage breakdown before it occurs. These structures act as cushions that absorb and distribute voltage stress, allowing the device to handle higher voltages across gate-source without exceeding the breakdown voltage and causing reliability issues.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If DE-MOS FETs with graded junctions and field oxides are used, then the voltage handling capability and safe operating area are improved, but the device complexity and manufacturing complexity increase

Engineering Contradiction:
Improvesafe operating areaVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent reduces manufacturing complexity by applying graded junctions and field oxides only in specific local regions where they are most needed for voltage handling, rather than throughout the entire device structure. This localized approach maintains high reliability benefits while minimizing the additional manufacturing steps and complexity required.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11742846B1Semiconductor switches for high voltage operations
Publication Date: 2023.08.29 TEXAS INSTRUMENTS INC
  • US11742846B1 patent drawing
  • US11742846B1 patent drawing
  • US11742846B1 patent drawing

AI summary

Semiconductor switches for high voltage operations are described. The semiconductor switch includes a first DE-NMOS FET including a gate coupled to a node of the switch with its source and drain coupled to input and output nodes, respectively. The switch also includes a second DE-NMOS FET with a drain coupled to the node. A gate of the second DE-NMOS FET is configured to receive a signal enabling or disabling the switch. The switch includes a voltage source (e.g., a voltage-controlled voltage source) coupled to the node, which supplies a first voltage at the node. The first voltage is greater than a second voltage at the input node by a predetermined amount such that the first DE-NMOS FET may operate within a safe operating area while supporting high voltage operations. The switch also includes a current source configured to supply current to the voltage source.