Demultiplexer Circuit with Oxide Semiconductor TFTs
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Solution Overview
Problem
The existing active matrix substrates with demultiplexer circuits face challenges in reducing the size of TFTs used in these circuits, particularly when using oxide semiconductor TFTs, which have higher mobility and result in larger channel widths, increasing the area of the demultiplexer circuit.
Innovation Solution
The design incorporates a demultiplexer circuit with unit circuits that include multiple TFTs with an oxide semiconductor layer, where the first and second electrodes are electrically coupled with the oxide semiconductor layer, and interlayer insulating layers are used to reduce the channel length and source-drain distance, allowing for a more compact configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If oxide semiconductor TFTs are used in the demultiplexer circuit, then the mobility is improved and operation speed is increased, but the channel width becomes larger and the circuit area increases
Solution Approach 1:
The patent transitions from a planar single-layer electrode configuration to a three-dimensional multi-layer electrode structure. The source and drain electrodes are arranged in different layers (first and second electrode layers) with insulating films between them, allowing vertical stacking that reduces the horizontal footprint of the TFT while maintaining the high mobility benefits of oxide semiconductor materials.
Solution Approach 2:
The patent implements a nested structure where electrode layers are embedded within multiple insulating film layers. The source/drain electrodes are positioned between different insulating film layers (first, second, and third insulating films), creating a compact nested arrangement that reduces the overall circuit area while preserving electrical functionality.
2Area of stationary object
If the channel length is reduced to make the TFT more compact, then the circuit area is reduced, but the manufacturing precision requirements increase
Solution Approach 1:
The patent divides the electrode structure into multiple segmented layers (first electrode layer, second electrode layer) separated by insulating films. This segmentation allows each layer to be formed and positioned independently, reducing the cumulative alignment errors that would occur in a single-layer structure and enabling shorter channel lengths with maintained manufacturing precision.
Solution Approach 2:
The patent introduces insulating films as intermediary layers between the source and drain electrodes. These insulating films serve as spacing elements that define the channel length precisely and facilitate the formation process, allowing for compact TFT design without compromising alignment precision during manufacturing.
Data Source
AI summary
In a demultiplexer circuit, each unit circuit includes at least n TFTs 30 and n branch lines connected with one video signal line. Each TFT 30 includes an oxide semiconductor layer 7, an upper gate electrode 11 provided on the oxide semiconductor layer with a gate insulating layer 9 interposed therebetween, and a first electrode 13 and a second electrode 15. The demultiplexer circuit further includes a first interlayer insulating layer 21 covering the oxide semiconductor layer and the upper gate electrode and a second interlayer insulating layer 23 provided on the first interlayer insulating layer. The first electrode 13 is provided between the first interlayer insulating layer 21 and the second interlayer insulating layer 23 and is in contact with the oxide semiconductor layer inside a first contact hole CH1 formed in the first interlayer insulating layer. The second electrode 15 is provided on the second interlayer insulating layer 23 and is in contact with the oxide semiconductor layer inside a second contact hole CH2 formed in the first and second interlayer insulating layers.