Demultiplexer Circuit for RGBG Display Power Reduction
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Solution Overview
Problem
Existing display devices with RGBG pixel arrangements face challenges in reducing power consumption and efficiently performing demultiplexing operations for applying data voltages to pixels.
Innovation Solution
A display device with a demultiplexer circuit that selectively couples data lines to output channels based on switching signals, allowing for reduced power consumption and efficient demultiplexing operations, particularly in applying data voltages to sub-pixels in an RGBG configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the number of output channels is reduced through demultiplexing, then device complexity is reduced, but power consumption increases due to sequential switching operations
Solution Approach 1:
The patent applies periodic action by dividing the horizontal time into multiple periods and sequentially coupling different data lines to output channels in a time-division manner. The demultiplexer circuit switches between different data lines (e.g., DL1 to OC1 in first period, DL3 to OC1 in second period) periodically, enabling reduced output channels while managing power consumption through controlled switching timing.
Solution Approach 2:
The patent implements dynamics by making the coupling between data lines and output channels time-variable rather than fixed. The demultiplexer circuit dynamically changes connections based on switching signals, allowing each output channel to be selectively coupled to different data lines at different times, thus reducing the number of permanent output channels needed.
2Device complexity
If sequential coupling is used to reduce output channels, then device complexity is reduced, but time efficiency deteriorates due to time-division multiplexing
Solution Approach 1:
The patent uses periodic action to structure the time-division multiplexing into regular intervals, where each data line is coupled to its designated output channel during specific periods. This periodic switching pattern allows the system to manage time efficiency by predicting and planning data transmission schedules, reducing uncertainty and optimization opportunities.
Solution Approach 2:
The patent applies preliminary action by pre-configuring the demultiplexer circuit with switching signals that determine the coupling sequence before actual data transmission begins. The switching signals are generated in advance to control when each data line connects to which output channel, allowing the system to prepare connection paths beforehand and reduce switching delays during operation.
Data Source
AI summary
A display device includes a display panel, a data driver and a demultiplexer circuit. The display panel includes first, second, third and fourth data lines, and first, second, third and fourth sub-pixels respectively coupled to the first, second, third and fourth data lines. The data driver includes a first output channel and a second output channel. The demultiplexer circuit selectively couples at least one of the first data line and the third data line to the first output channel in response to first and second switching signals, and selectively couples at least one of the second data line and the fourth data line to the second output channel in response to third and fourth switching signals different from the first and second switching signals.