Demultiplexer Register for Virtual Memory Device Segmentation
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Solution Overview
Problem
Current memory modules are energy inefficient due to excessive activation of bits during memory access, with most bits accessed not being used, leading to wastage of dynamic power, especially in multi-core systems where independent memory access requests from multiple threads are interleaved, resulting in inefficient energy usage.
Innovation Solution
The implementation of multi-core memory modules with a demultiplexer register that groups memory chips into virtual memory devices, allowing for independent control and configuration based on performance and energy efficiency needs, enabling separate memory requests to be handled through a shared command path in a time-division multiplexed manner, reducing the number of activated bits and optimizing energy usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory chips are activated to handle multiple memory access requests, then memory bandwidth and capacity are improved, but energy consumption increases due to excessive bits being activated per access
Solution Approach 1:
The memory module is segmented into multiple independently controllable virtual memory devices (VMDs), where each VMD consists of one or more memory chips. The demultiplexer register divides the incoming memory access requests and routes them to specific VMDs, allowing only the necessary memory chips to be activated for each access request. This segmentation enables selective activation of memory chips based on actual access needs, reducing the number of activated bits while maintaining memory bandwidth capacity.
2Adaptability or versatility
If memory chips are grouped into fixed configurations, then device complexity is reduced, but adaptability to changing performance and energy efficiency needs is limited
Solution Approach 1:
The memory module implements dynamic reconfigurability where the demultiplexer register can be programmed to create different VMD configurations based on runtime performance and energy efficiency requirements. The system can dynamically adjust the number of VMDs and the composition of memory chips within each VMD to match changing workload characteristics, access patterns, and energy constraints, providing adaptability without requiring physical reconfiguration of the memory hardware.
3Productivity
If multiple memory access requests from multiple threads are handled simultaneously, then system performance is improved, but energy efficiency deteriorates due to interleaved accesses activating excessive bits
Solution Approach 1:
The demultiplexer register segments the interleaved memory access requests from multiple threads and routes them to different virtual memory devices. By dividing the memory chips into separate VMDs and selectively activating only those VMDs that have pending access requests, the system can handle multiple threads simultaneously while minimizing the number of activated bits. This segmentation prevents unnecessary activation of memory chips that do not have current access requests, improving energy efficiency while maintaining system performance.
Data Source
AI summary
Various embodiments of the present invention are directed multi-core memory modules. In one embodiment, a memory module (500) includes memory chips, and a demultiplexer register (502) electronically connected to each of the memory chips and a memory controller. The memory controller groups one or more of the memory chips into at least one virtual memory device in accordance with changing performance and/or energy efficiency needs. The demultiplexer register (502) is configured to receive a command indentifying one of the virtual memory devices and send the command to the memory chips of the identified virtual memory device. In certain embodiments, the memory chips can be dynamic random access memory chips.