Dense A/D Bit Representation for Virtual Memory Management
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Solution Overview
Problem
Conventional virtual memory management techniques face inefficiencies due to sparse storage of A/D bits, leading to suboptimal operation and bandwidth resource waste, preventing the use of native bit vector handling instructions for parallel processing.
Innovation Solution
Implementing a dense A/D bit representation as a bit vector within the memory management unit, which generates and stores A/D bits efficiently, reducing bandwidth consumption and enabling parallel processing, and allowing for increased spatial locality of virtual memory accesses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If sparse storage of A/D bits is used in conventional virtual memory management, then memory space is conserved in page tables, but scanning efficiency deteriorates and bandwidth resources are wasted
Solution Approach 1:
The patent segments the A/D bit storage from the page table structure, creating a separate dense bit vector that is independently optimized for scanning operations while the page table maintains its sparse structure for memory efficiency
Solution Approach 2:
The patent introduces a new dimension for A/D bit storage by creating a separate data structure (bit vector) that exists alongside the page table, allowing optimization of scanning operations without affecting the memory-efficient sparse page table structure
2Device complexity
If sparse A/D bit storage is used, then page table size is reduced, but parallel processing capability deteriorates due to inability to use native bit vector instructions
Solution Approach 1:
The patent separates A/D bit storage into a dedicated bit vector structure that can be processed in parallel using native CPU bit vector instructions, while the page table maintains its compact sparse format
Solution Approach 2:
The patent introduces a bit vector as an intermediary data structure that bridges the page table and processing units, enabling efficient parallel processing of A/D bits through native bit vector instructions without affecting page table structure
3Quantity of substance
If conventional sparse A/D bit storage is used, then memory bandwidth is conserved in page tables, but bandwidth usage efficiency deteriorates during scanning operations
Solution Approach 1:
The patent creates a separate dimension for A/D bit storage in the form of a dense bit vector, allowing scanning operations to access only the relevant bits through a dedicated structure rather than traversing the entire page table, thereby improving bandwidth efficiency
Data Source
AI summary
A/D bit storage, processing, and mode management techniques through use of a dense A/D bit representation are described. In one example, a memory management unit employs an A/D bit representation generation module to generate the dense A/D bit representation. In an implementation, the A/D bit representation is stored adjacent to existing page table structures of the multilevel page table hierarchy. In another example, memory management unit supports use of modes as part of A/D bit storage.