Dense DIMM Spacing and Symmetrical Heatsink for Server Cooling

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Solution Overview

Problem

Traditional server layouts with wide DIMM pitch and asymmetrical CPU heatsinks reduce cooling air to CPUs, leading to increased flow resistance and inadequate cooling for higher-power components, while also compromising signal integrity and routing due to wider spacing and lack of center air channels for rear devices.

Innovation Solution

Implementing a dense DIMM spacing, wider and symmetrical heatsinks, and improved air delivery channels to ensure effective cooling and routing for both CPUs and rear-mounted IO devices within a standard nineteen inch rack, utilizing compliant pin memory sockets and surface mount capacitors to optimize airflow and signal routing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If wide DIMM pitch is used to accommodate more components, then component placement flexibility is improved, but cooling air flow to CPUs is reduced

Engineering Contradiction:
Improvecomponent placement flexibilityVSAvoidcooling air flow
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent transitions from a traditional wide-pitch two-dimensional layout to a dense three-dimensional stacked configuration. Memory modules are positioned vertically above I/O devices rather than horizontally beside them, enabling efficient use of vertical space while maintaining optimal cooling airflow paths to CPU heatsinks.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs asymmetrical component placement where memory modules are stacked directly above I/O devices in specific regions, while other areas maintain traditional layouts. This selective asymmetry optimizes both space utilization and cooling airflow distribution without compromising signal integrity in critical areas.

Inventive Principle:
Principle #4Asymmetry

2Temperature

If heatsink length is increased to increase heat transfer area, then heat transfer capability is improved, but flow resistance is increased

Engineering Contradiction:
Improveheat transfer capabilityVSAvoidflow resistance
Core Design Contradiction:
TemperatureVSLoss of energy

Solution Approach 1:

The patent transitions from horizontal heatsink extension to vertical stacking configuration. By positioning memory modules above I/O devices, the design creates vertical cooling channels that reduce airflow path length and resistance while maintaining adequate heat dissipation surface area through optimized heatsink geometry.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent modifies the heatsink configuration by reducing its length in the airflow direction and compensating with increased width or height. This parameter change reduces flow resistance while maintaining heat transfer area, achieving optimal balance between cooling effectiveness and airflow efficiency.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If wide DIMM pitch is used, then manufacturing ease is improved, but signal integrity is worsened

Engineering Contradiction:
Improvemanufacturing easeVSAvoidsignal integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent resolves signal integrity issues by transitioning to vertical stacking where memory modules are positioned above I/O devices. This three-dimensional arrangement shortens signal paths and reduces crosstalk while maintaining manufacturability through standardized vertical mounting configurations.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Device complexity

If traditional layout is used, then device complexity is reduced, but cooling effectiveness to rear devices is worsened

Engineering Contradiction:
Improvelayout complexityVSAvoidcooling effectiveness
Core Design Contradiction:
Device complexityVSTemperature

Solution Approach 1:

The patent introduces vertical stacking of memory modules above rear I/O devices, creating dedicated cooling channels that deliver cool air directly to heat-generating components. This three-dimensional configuration improves cooling effectiveness without significantly increasing overall system complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances airflow to CPUs, reduces inlet temperatures for rear IO devices, and improves signal integrity by providing dedicated cooling channels and routing corridors, effectively managing heat and signal transmission even in high-ambient temperatures.

Implementation Method 1

CPU heatsink

Methodology Applied
Scientific EffectHeat transfer: Convection

Implementation Method 2

heatsink

Methodology Applied
Scientific EffectThermal radiation: Thermal Radiation

Implementation Method 3

cooling air

Methodology Applied
Scientific EffectForced convection: Forced Convection

Data Source

PatentUS9820405B1Optimized server design using dense DIMM spacing, wide heatsink, improved routing channels, and improved air delivery to rear devices
Publication Date: 2017.11.14 EMC IP HLDG CO LLC
  • US9820405B1 patent drawing
  • US9820405B1 patent drawing
  • US9820405B1 patent drawing

AI summary

Example embodiments of the present invention provide a method of manufacture and an apparatus for optimized server design using dense DIMM spacing, wide heatsink, improved routing channels, and improved air delivery to rear devices. The method of manufacture comprise providing a plurality of compliant pin memory sockets on a first side of a circuit board at a pitch less than that specified in a reference layout requiring solder tail memory sockets and providing a plurality of surface mount capacitors on the second side of the circuit board enabling at least one pair of the plurality of compliant pin memory sockets to be provided at the pitch less than that specified in the reference layout.