Dense Hole Patterns via Spacer Etching
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Solution Overview
Problem
Current double patterning technologies for forming dense hole patterns in semiconductor devices face limitations in achieving pitches or diameters smaller than the minimum resolution of photolithography processes, particularly in scaling and design rule implementation.
Innovation Solution
A method involving the formation of first and second pillars on hard mask layers, with a spacer layer, and subsequent etching to expose substrate portions, allowing for the creation of dense hole patterns with enhanced pitch and diameter capabilities through a series of precise mask layer formations and etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography processes are used, then the process is simple and equipment costs are low, but the pitch and diameter of hole patterns cannot be made smaller than the minimum resolution
Solution Approach 1:
The fabrication process is divided into multiple sequential stages: forming first pillars with initial patterns, depositing spacer layers, etching to create first holes, removing first pillars, and forming second holes. This segmentation allows each stage to achieve specific pattern density improvements, ultimately achieving 2x or higher pattern density compared to conventional single-step photolithography
Solution Approach 2:
The method performs preliminary pattern formation by creating first pillars and spacer structures before final hole etching. The spacer layer is deposited and patterned in advance, and first pillars are removed to create second holes, preparing the structure for subsequent etching operations. This preliminary action enables the formation of dense hole patterns that would be impossible with direct photolithography alone
2Manufacturing precision
If double patterning techniques like LELE or SADP are used to achieve smaller pitches, then pattern density increases, but process complexity and design rule constraints increase
Solution Approach 1:
The spacer layer automatically forms conformal structures around the first pillars through deposition, creating second pillars that self-align to the first pillar positions. This self-aligned mechanism eliminates the need for complex alignment procedures and design rule calculations required by traditional LELE or SADP methods, simplifying process implementation while achieving high pattern density
Solution Approach 2:
The method transitions from planar photolithography patterning to three-dimensional structure formation using vertical spacer deposition and selective etching. By utilizing the vertical dimension for spacer layer deposition and subsequent horizontal etching, the process achieves pattern density multiplication without being constrained by photolithography resolution limits or complex two-dimensional alignment rules
Data Source
AI summary
A method of forming dense hole patterns of semiconductor devices includes: forming a plurality of first pillars on at least one lower hard mask layer disposed on a substrate; forming a spacer layer on the lower hard mask layer to form a plurality of second pillars respectively covering the first pillars, wherein a plurality of first holes are formed among the second pillars; etching the spacer layer to expose first portions of the lower hard mask layer via the first holes and expose top surfaces of the first pillars; removing the first pillars to form a plurality of second holes in the spacer layer to expose second portions of the lower hard mask layer; etching the first portions and the second portions of the lower hard mask layer at least until portions of the substrate are exposed; and removing remaining portions of the spacer layer.