Densified Fill Layer for Uniform Vertical Fin Etch-Back
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Solution Overview
Problem
The challenge in forming Field Effect Transistors (FETs) lies in achieving uniform etch-back rates for vertical fins, which results in uneven exposure and inconsistent dimensions due to varying fill layer densities, leading to scaling issues as device dimensions decrease.
Innovation Solution
A method involving the formation of a sacrificial layer and a densified fill layer is implemented, where a sacrificial layer is removed to create sidewall channels, allowing for uniform densification of the fill layer through steam anneal, thereby controlling the etch-back rate and ensuring uniform fin heights.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a fill layer is formed between vertical fins without densification, then the fabrication process is simpler and faster, but the etch-back rate becomes non-uniform leading to inconsistent fin heights
Solution Approach 1:
The fill layer undergoes densification treatment before the etch-back process to pre-establish uniform etch characteristics. This preliminary densification ensures that subsequent etching proceeds uniformly across all fill layers, producing consistent fin heights without requiring complex real-time control during etching.
Solution Approach 2:
The densification process modifies the physical and chemical parameters of the fill layer (density, composition, microstructure) to optimize its etching behavior. By controlling parameters such as annealing temperature, atmosphere, and duration, the fill layer achieves uniform etch-back rate while maintaining process feasibility.
2Productivity
If device dimensions are scaled down, then higher integration density is achieved, but uniform etch-back becomes more difficult to maintain
Solution Approach 1:
The densification process adjusts fill layer parameters (density, stoichiometry, microstructure) to ensure uniform etch-back behavior even as device dimensions scale down. This parameter optimization maintains etch-back uniformity across varying feature sizes, enabling continued scaling while preserving manufacturing precision.
3Manufacturing precision
If the fill layer is densified through steam anneal, then etch-back rate uniformity is improved, but the processing time and temperature requirements increase
Solution Approach 1:
The steam annealing process optimizes temperature, time, and atmosphere parameters to achieve adequate densification with reasonable energy input. By controlling these parameters, the process achieves uniform etch-back characteristics while managing energy consumption and processing efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures consistent and uniform channel and gate structure dimensions for vertical FinFETs, reducing fin height variations and improving the uniformity of the fill layer, which is essential for maintaining device performance as dimensions shrink.
Implementation Method 1
subjecting the fill layer to a densification process to form the densified fill layer
Data Source
AI summary
In accordance with an embodiment of the present invention, a method of forming a densified fill layer is provided. The method includes forming a pair of adjacent vertical fins on a substrate, forming an inner liner on the sidewalls of the adjacent vertical fins, and forming a sacrificial layer on the inner liner. The method further includes forming a fill layer between the pair of adjacent vertical fins, wherein the fill layer is in contact with at least a portion of the sacrificial layer, removing at least a portion of the sacrificial layer in contact with the fill layer to form sidewall channels adjacent to the fill layer, and subjecting the fill layer to a densification process to form the densified fill layer.