De-packaging Small Outline Transistor Packages for Die Testing

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Solution Overview

Problem

Small Outline Transistor (SOT) packages are difficult to debug due to the challenge of accessing the die within the package, particularly the back surface, which is electrically grounded, making it hard to test and evaluate the underlying circuitry effectively.

Innovation Solution

A method involving the removal of molding compound, etching of the die attach pad, and forming an ohmic contact on the back surface to ground the die, allowing for proper electrical testing and debugging.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the die attach pad is removed to access the back surface of the die, then accessibility for testing is improved, but the die can no longer be properly grounded causing circuitry to malfunction

Engineering Contradiction:
Improveaccessibility to die back surfaceVSAvoidelectrical grounding of die
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent segments the die attach pad removal process by selectively removing only the pad material while preserving the underlying ground lead connection. This allows the back surface to be accessible while maintaining the electrical ground path through the lead frame, resolving the contradiction between accessibility and grounding reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary ground lead connection that mediates between the removed die attach pad and the die back surface. By establishing a new ground connection through the lead frame to the die back surface, the patent maintains proper grounding while enabling access to the circuitry.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Volume of moving object

If the SOT package size is kept small for miniaturization, then device compactness is improved, but accessibility to the die for debugging becomes difficult

Engineering Contradiction:
Improvepackage sizeVSAvoidaccessibility to die
Core Design Contradiction:
Volume of moving objectVSEase of operation

Solution Approach 1:

The patent extracts the die from its original encapsulated position by selectively removing the molding compound and die attach pad materials. This extraction process creates access to the die back surface while preserving the compact overall package structure, resolving the contradiction between miniaturization and accessibility.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies local quality changes by selectively removing materials only in specific areas (molding compound over the die, die attach pad) while leaving the rest of the compact package structure intact. This localized modification enables access to the die back surface without increasing the overall package volume.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If multiple levels of metal interconnect and dielectric layers are present on the die, then circuit functionality is improved, but accessibility to underlying circuitry becomes difficult

Engineering Contradiction:
Improvecircuit functionalityVSAvoidaccessibility to underlying circuitry
Core Design Contradiction:
Adaptability or versatilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent inverts the conventional approach of accessing circuitry from the top surface through multiple interconnect layers. By removing the die attach pad and accessing the die back surface, the patent provides direct access to the underlying circuitry and ground connections, eliminating the need to navigate through multiple metal and dielectric layers.

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables effective electrical testing and debugging of SOT package circuitry by grounding the die, overcoming the accessibility issues and ensuring the circuitry operates correctly.

Implementation Method 1

An etching solution is subsequently introduced through an opening in the mask to etch away the die attach pad

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

An ohmic contact is then formed on the exposed back surface of the die. The ohmic contact is used to ground the die so that the electrical circuitry on the device will operate properly

Methodology Applied
Scientific EffectOhmic contact: Conduction (electrical)

Data Source

PatentUS7279343B1De-packaging process for small outline transistor packages
Publication Date: 2007.10.09 NAT SEMICON CORP
  • US7279343B1 patent drawing
  • US7279343B1 patent drawing
  • US7279343B1 patent drawing

AI summary

A method to de-packaging a semiconductor device to access and test the die within the package. The method involves initially removing molding compound from a first surface of the package to expose the underlying die attach pad of the package. A mask is then formed over the die attach-pad. An etching solution is subsequently introduced through an opening in the mask to etch away the die attach pad. Once the etching is complete, the die attach film is removed. An ohmic contact is then formed on the exposed back surface of the die. The ohmic contact is used to ground the die so that the electrical circuitry on the device will operate properly. Once grounded, the circuitry on the die can be electrically tested and debugged.