DEPFET Channel Doping Layout for Single-Electron Detection
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Solution Overview
Problem
Conventional DEPFET transistors face limitations in achieving high signal-to-noise ratios due to short channel effects and avalanche generation when the gate length is reduced, which hampers the detection of single signal electrons.
Innovation Solution
A DEPFET transistor design with a signal charge control region below the gate electrode, having a higher doping dose than the substrate doping enhancement region, and optionally a resistance region or channel regions with lower doping, to maintain a small gate length without increased field strengths, thereby reducing avalanche generation and enhancing signal amplification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the gate length of a DEPFET transistor is made shorter to increase transconductance and signal amplification, then the signal-to-noise ratio should improve, but short channel effects and avalanche generation occur that limit further increase of the signal-to-noise ratio
Solution Approach 1:
The patent applies local quality by creating a substrate doping enhancement region with higher doping concentration specifically in the channel area below the gate electrode. This localized doping enhancement modifies the electric field distribution and potential profile in the channel region, allowing the transistor to operate with reduced short channel effects while maintaining the benefits of a short gate length for high transconductance. The non-uniform doping profile optimizes carrier transport and reduces unwanted effects at specific locations without compromising overall device performance.
2Power
If the gate length is reduced to achieve high signal amplification, then transconductance increases, but field strengths increase leading to increased avalanche generation
Solution Approach 1:
The patent changes the doping parameter in the substrate by introducing a substrate doping enhancement region with higher doping concentration in the channel area. This parameter change modifies the electric field distribution and reduces field strengths in critical regions, thereby suppressing avalanche generation while maintaining the short gate length necessary for high signal amplification and transconductance.
3Ease of manufacture
If conventional DEPFET designs are used, then manufacturing is straightforward, but the detection of single signal electrons is hampered by limited signal-to-noise ratio
Solution Approach 1:
The patent introduces a localized substrate doping enhancement region with higher doping concentration specifically in the channel area below the gate electrode. This local modification optimizes carrier transport and reduces noise while maintaining compatibility with conventional manufacturing processes, thereby enabling detection of single signal electrons without significantly complicating the manufacturing procedure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves high signal-to-noise ratios and amplification with reduced capacitance, allowing for efficient detection of single signal electrons and a large dynamic range without short channel effects.
Implementation Method 1
a substrate doping enhancement region of a first conductivity type formed at the first main surface at least under the source connection region and under the channel region, wherein the substrate doping enhancement region comprises a signal charge control region of the first conductivity type below the gate electrode, in which the effective doping dose has a higher value than at other positions of the substrate doping enhancement region
Implementation Method 2
When a reverse voltage is applied between the back side contact region 204 and the semiconductor substrate contact region 220 and the potentials of the source connection region 201s and the back side contact region 204 are appropriately adjusted, in the depleted semiconductor substrate a potential distribution can be generated such that a potential minimum for electrons exists below the transistor channel
Implementation Method 3
When signal electrons that have been generated in the semiconductor by radiation accumulate in this potential minimum, they are able to control the current in the channel from there
Implementation Method 4
a gate electrode above the channel region that is separated from the channel region by a gate insulator
Data Source
AI summary
The invention relates to a DEPFET comprising: a semiconductor substrate (100) of a first conduction type, which has a first main surface (101) and a second main surface (102), which are opposite one another; a source terminal region (1s) of a second conduction type on the first main surface (101); a drain terminal region (1d) of a second conduction type; a channel region (10), which is arranged between the source terminal region (1s) and the drain terminal region (1d); a gate electrode (11), which is separated from the channel region (10) by a gate insulator (6); a rear activation region (104) of a second conduction type, which is formed on the second main surface (102); and a substrate doping increase region (2) of a first conduction type, which is formed at least under the source terminal region (1s) and under the channel region (10), the substrate doping increase region (2) having a signal charge control region (20) of the first conduction type below the gate electrode (11), in which signal charge control region the effective doping dose has a higher value than at other points of the substrate doping increase region (2) below the gate electrode.