Depleted Gate Shield Trench MOSFET for Low Capacitance

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Solution Overview

Problem

Existing shielded gate trench power MOSFETs face challenges in balancing reduced on resistance (RON) with increased gate-to-source and drain-to-source capacitance, leading to high electric fields and manufacturing complexity, which affects reliability and efficiency.

Innovation Solution

A depleted gate shield is formed in a trench power MOSFET device, using a dopant type opposite to the drift region, reducing the electric field in the oxide and transferring stress to the polysilicon material, allowing for a thinner oxide layer and smaller trench width, thereby lowering RDSon and output capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a shield is formed under the polysilicon gate within a trench to improve the tradeoff between breakdown voltage and on resistance, then the on resistance is reduced, but the gate-to-source capacitance and drain-to-source capacitance increase

Engineering Contradiction:

Improvebreakdown voltageVSAvoidgate-to-source capacitance and drain-to-source capacitance

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The patent changes the doping concentration parameter of the shield from heavily doped (n-type) to lightly doped or depleted (p-type), which fundamentally alters the electric field distribution. This parameter change reduces the capacitance between the shield and adjacent regions while maintaining the voltage blocking capability, thus resolving the contradiction between breakdown voltage and capacitance.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If a thick layer of oxide is used adjacent to the shield to ensure device reliability against hot carrier injections and time-dependent dielectric breakdowns, then the reliability is improved, but the trench width increases and manufacturing complexity increases

Engineering Contradiction:

Improveprotection against hot carrier injections and time-dependent dielectric breakdownsVSAvoidtrench width and manufacturing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

By changing the shield doping from heavy n-type to light p-type or depleted, the patent reduces the peak electric field at the oxide-shield interface. This parameter change allows the use of a thinner oxide layer while maintaining the same reliability protection level, thus reducing trench width and manufacturing complexity.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent converts the previously harmful high electric field at the oxide-shield interface into a beneficial low electric field region by using a depleted or lightly doped shield. This transforms the original problem of high stress on the oxide into an advantage where a thinner oxide can provide the same protection, simplifying the device structure.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Ease of manufacture

If an in-situ doped N+ polysilicon material is used to form the shield, then the shield formation is simplified, but the parasitic output capacitance is dominated by the shield surface area and oxide thickness

Engineering Contradiction:

Improveshield formationVSAvoidparasitic output capacitance

Core Design Contradiction:

Ease of manufactureVSQuantity of substance

Solution Approach 1:

Instead of using heavily doped n-type polysilicon for the shield, the patent inverts the approach by using lightly doped or depleted p-type polysilicon. This inversion changes the electrical characteristics to reduce parasitic capacitance while still providing the necessary shielding function, thus resolving the contradiction between ease of manufacture and capacitance reduction.

Inventive Principle:

Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The depleted gate shield significantly reduces the drain-to-source resistance and output capacitance, enhancing power conversion efficiency and reliability while simplifying manufacturing by allowing a thinner oxide layer and smaller trench dimensions.

Implementation Method 1

significantly reduces the magnitude of the electrical field in the oxide material adjacent the shield and in the trench, and thereby transfers a substantial amount of the stress generated by the electric field to the polysilicon material of the shield

Methodology Applied

Scientific EffectElectric field: Electric Field

Implementation Method 2

A depleted gate shield is formed in a trench power MOSFET device, using a dopant type opposite to the drift region

Methodology Applied

Scientific EffectDepletion:

Data Source

PatentUS10832915B2Trench MOSFET with depleted gate shield and method of manufacture

Publication Date: 2020.11.10 GREAT WALL SEMICONDUCTOR CORP

AI summary

A semiconductor device, method of manufacture of a semiconductor device, and electronic system are disclosed. For example, the semiconductor device includes at least one trench disposed in a semiconductor substrate of the semiconductor device, wherein the semiconductor substrate has a first conductivity type. The semiconductor device further includes a polysilicon depleted gate shield disposed in the at least one trench, wherein the polysilicon depleted gate shield has a second conductivity type. The semiconductor device also includes a drift region disposed in the semiconductor substrate adjacent to at least one sidewall of the at least one trench, wherein the drift region has the first conductivity type, and a polysilicon gate disposed over the depleted gate shield in the at least one trench.