Depletion-Mode Analog Switch for Power-Down Signal Passing

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Solution Overview

Problem

Analog switches face challenges in passing signals during power down conditions, as n-type and p-type metal-oxide-semiconductor switches cannot pass signals above or below ground, and traditional CMOS switches result in significant signal distortion.

Innovation Solution

A depletion-mode transistor switch device is enabled with a constant 0V gate-to-source voltage, allowing signal passage without power applied and disabling the switch when power is applied, using a control circuit and tracking circuit to maintain a 0V gate-to-source voltage and isolate nodes as needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional CMOS analog switches are used during power down conditions, then signals can be passed, but significant signal distortion and poor quality occur

Engineering Contradiction:
Improvesignal qualityVSAvoidsignal distortion
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent changes the operating parameter of the analog switch by using a depletion mode transistor instead of a traditional enhancement mode CMOS transistor. This allows the transistor to conduct at zero gate-to-source voltage, enabling signal passage during power down conditions without the significant distortion that plagues traditional CMOS switches. The parameter change from enhancement mode to depletion mode operation fundamentally alters how the transistor behaves in the off-state.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If n-type metal-oxide-semiconductor switches are used during power down, then they can pass signals, but they cannot pass signals above ground due to lack of positive gate-to-source voltage

Engineering Contradiction:
Improvesignal passage capabilityVSAvoidsignal voltage range
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent changes the transistor type from enhancement mode to depletion mode, which fundamentally alters the voltage requirements. Depletion mode transistors conduct at zero gate-to-source voltage and can be pinched off by applying a negative voltage, whereas enhancement mode transistors require positive gate-to-source voltage to conduct. This parameter change enables the switch to operate correctly during power down conditions where supply voltages may be absent or unstable.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the switch is enabled to pass signals during power down, then signal passage is achieved, but power consumption increases when power is applied

Engineering Contradiction:
Improvesignal passage during power downVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic control of the analog switch through a control circuit that adapts the switch state based on power supply conditions. During power down, the switch remains enabled to pass signals. When power is applied and the control circuit detects the presence of supply voltage, it dynamically disables the switch by applying the appropriate gate voltage. This dynamic behavior ensures the switch automatically adapts to power conditions without consuming unnecessary power when enabled.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8502595B2Power down enabled analog switch
Publication Date: 2013.08.06 SEMICON COMPONENTS IND LLC
  • US8502595B2 patent drawing
  • US8502595B2 patent drawing
  • US8502595B2 patent drawing

AI summary

This document discusses, among other things, apparatus and methods for passing a signal in a power down state. An example switch device can include a first depletion-mode transistor configured to pass an analog signal between a first node and a second node in a first state and to isolate the first node from the second node in a second state, a control circuit coupled to a control node of the first depletion-mode transistor and configured to isolate the control node from a first supply input in the first state and to couple the control node to the first supply input in the second state, and a tracking circuit configured to couple the control node of the first depletion-mode transistor to the first node during the first state and to isolate the control node of the first depletion-mode transistor from the first node in the second state.