Depletion Transistor Gate Bias Circuit for Stable Turn-Off
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Solution Overview
Problem
Depletion transistors in driver circuits of display devices cannot be turned off effectively, leading to malfunction and degradation due to high Vgs, which affects the operating frequency range and transistor reliability.
Innovation Solution
A semiconductor device configuration that includes specific transistors and a capacitor to generate an offset signal, allowing the transistor to be turned off even when it is a depletion type, thereby reducing Vgs and preventing degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If depletion transistors are used in driver circuits, then device integration and uniform transistor characteristics are improved, but transistor degradation and circuit malfunction occur due to high Vgs and inability to turn off properly
Solution Approach 1:
The patent applies preliminary action by making the gate floating before the transistor channel forms. The gate is connected to the drain through a resistor, and this connection is established in advance. When the transistor turns on, the gate potential rises to the drain potential, automatically creating the floating gate condition needed for depletion transistor operation. This preliminary setup prevents the transistor from turning off and reduces Vgs, thereby preventing degradation while maintaining device integration benefits.
2Adaptability or versatility
If depletion transistors are used in driver circuits, then device integration is improved, but circuit malfunction occurs due to inability to make gate floating and perform bootstrap operation
Solution Approach 1:
The patent applies preliminary action by establishing the gate-to-drain resistor connection before the transistor channel forms. This ensures that when the transistor turns on, the gate potential automatically rises to the drain potential, creating the floating gate condition required for proper bootstrap operation. This preliminary setup prevents circuit malfunction while maintaining the benefits of device integration.
3Ease of operation
If high driving voltage is used to turn on depletion transistors, then transistor turn-on is achieved, but transistor degradation is promoted and circuit malfunction occurs
Solution Approach 1:
The patent applies preliminary action by making the gate floating before the transistor channel forms through a resistor connection to the drain. When the transistor turns on, the gate potential rises to the drain potential automatically, reducing Vgs to near zero. This prevents degradation while maintaining the ability to turn on the transistor, eliminating the need for excessively high driving voltages.
Solution Approach 2:
The patent applies parameter changes by dynamically changing the gate potential from a negative value (before turn-on) to the drain potential (after turn-on). This parameter change reduces Vgs from a large negative value to near zero, preventing degradation while maintaining transistor conduction. The resistor value is selected to ensure the gate potential reaches the drain potential when the transistor is on.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device ensures stable operation of depletion transistors, reduces drain current in the off-state, and suppresses transistor degradation, preventing circuit malfunction.
Implementation Method 1
a capacitor C1... by using capacitive coupling of the capacitor C1
Data Source
AI summary
Provided is a semiconductor device which can operate stably even in the case where a transistor thereof is a depletion transistor. The semiconductor device includes a first transistor for supplying a first potential to a first wiring, a second transistor for supplying a second potential to the first wiring, a third transistor for supplying a third potential at which the first transistor is turned on to a gate of the first transistor and stopping supplying the third potential, a fourth transistor for supplying the second potential to the gate of the first transistor, and a first circuit for generating a second signal obtained by offsetting a first signal. The second signal is input to a gate of the fourth transistor. The potential of a low level of the second signal is lower than the second potential.