Deskew Circuits for Non-Invasive IC Debug Data Alignment
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Solution Overview
Problem
Existing configurable integrated circuits (ICs) face challenges in debugging due to the need for debugging circuitry that either occupies valuable user design space or requires invasive designs, leading to inefficiencies and the inability to readily redesign debugging components without disrupting the main circuitry.
Innovation Solution
A configurable IC with multiple deskew circuits and a separate configuration/debug network that allows for non-invasive debugging, using deskew circuits to align data bits and a trace buffer triggered by a programmable delay, enabling efficient data recording and analysis without disrupting user design implementations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If debugging circuitry is integrated into the main body of the configurable IC, then debugging functionality is provided, but configurable circuits that could otherwise be used for user design are occupied
Solution Approach 1:
The debugging circuitry is segmented from the main configurable IC body and placed on a separate debug carrier board. This allows the configurable IC to be used entirely for user design purposes while debugging functionality is provided through the separate debug carrier, eliminating the occupation of user design space.
Solution Approach 2:
The debugging circuitry is extracted from the main configurable IC and implemented as a separate debug carrier board that interfaces with the IC. This extraction allows the full area of the configurable IC to be dedicated to user design while debugging capabilities are provided through the external debug carrier.
2Reliability
If debugging circuitry is implemented using basic configurable circuits, then debugging functionality is provided, but the debugging circuitry cannot be readily redesigned without disrupting user design
Solution Approach 1:
The debugging circuitry is segmented into a separate debug carrier board that can be independently designed and modified. This segmentation allows the debugging circuit to be readily redesigned without affecting the user design implemented on the configurable IC, as the debug carrier is a separate, modifiable component.
Solution Approach 2:
The debugging circuitry is extracted from the configurable IC and implemented on a separate debug carrier board. This extraction provides full flexibility to redesign, modify, or update debugging functionality without disrupting or requiring changes to the user design on the configurable IC.
3Reliability
If fixed function debugging circuitry is physically located among configurable circuits, then debugging functionality is provided, but making the debugging circuitry larger requires redesigning the main configurable IC
Solution Approach 1:
The debugging circuitry is segmented from the main configurable IC and implemented on a separate debug carrier board. This allows the debugging circuit to be scaled in size or complexity without requiring any redesign of the main configurable IC, as the two are physically separate but interface through standardized connections.
Solution Approach 2:
The debugging circuitry is extracted from the main configurable IC structure and implemented as an independent debug carrier board. This extraction eliminates the constraint that would require redesigning the main IC if debugging circuitry size needs to be increased, as the debug carrier is a separate, independently scalable component.
Data Source
AI summary
Some embodiments provide a configurable integrated circuit (IC) comprising multiple deskew circuits for delaying data passage. Each of the deskew circuits comprises a stepwise delay circuit with multiple outputs and an input selection circuit with multiple inputs. Multiple outputs connect to multiple inputs.In some embodiments the configurable IC is a subcycle reconfigurable IC. In some such embodiments each of the deskew circuits further includes a space-time load control circuit for commanding the stepwise delay circuit to load during a selected subcycle. In some embodiments the multiple deskew circuits send data to a trigger circuit. In some such embodiments the trigger circuit triggers a trace buffer to stop recording a data stream. In some such embodiments the trigger circuit triggers the trace buffer to stop after a programmable delay.