De-Spreading Clock Recovery for Low-Jitter Video Links
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Solution Overview
Problem
Spread-spectrum clocking in digital video communication systems introduces clock jitter and synchronization challenges, particularly in devices like mobile devices with high-resolution LCD displays, where passive EMI reduction measures are not viable, and active measures like spread-spectrum clocking increase jitter during de-spreading.
Innovation Solution
A digital video communication device with a transmitter providing a spread-spectrum video signal and a receiver equipped with a free-running clock generator, digital control logic, and a line buffer that adjusts the frequency ratio to minimize jitter, using a frequency synthesizer to combine the free-running clock signal and adjusted frequency ratio for de-spreading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If spread-spectrum clocking is used to reduce EMI, then electromagnetic interference is reduced, but clock jitter increases during de-spreading
Solution Approach 1:
The transmitter pre-calculates and transmits timing adjustment values along with the spread-spectrum clock signal. The receiver uses these pre-provided timing values to compensate for jitter during de-spreading, eliminating the need for complex real-time jitter correction circuits while maintaining signal integrity
Solution Approach 2:
A timing adjustment mechanism acts as an intermediary between the spread-spectrum clock signal and the de-spreading process. The timing adjustment values serve as a mediator that synchronizes the receiver's de-spreading operation with the transmitter's spreading operation, preventing clock misalignment and jitter
2Object-affected harmful factors
If spread-spectrum clocking is used, then EMI is reduced, but clock and data misalignment occurs during de-spreading
Solution Approach 1:
The system implements feedback by transmitting timing adjustment information from the transmitter to the receiver. The receiver uses this feedback to continuously adjust its de-spreading timing, ensuring sustained synchronization between clock and data signals throughout operation
Solution Approach 2:
Timing adjustment values are calculated and transmitted in advance with the clock signal, allowing the receiver to pre-synchronize its de-spreading operation before data transmission begins, preventing misalignment rather than correcting it later
3Ease of operation
If link symbol clock synchronization is used with spread-spectrum clocking, then clock synchronization is achieved, but synchronization time increases causing more jitter
Solution Approach 1:
The transmitter prepares and transmits timing adjustment values before the receiver needs to synchronize. This preliminary provision of synchronization information eliminates the need for time-consuming synchronization searches, allowing immediate alignment upon signal reception
Solution Approach 2:
The synchronization information is extracted and transmitted separately from the main data stream as timing adjustment values. This separation allows the receiver to acquire synchronization information independently and immediately without waiting for data patterns, reducing synchronization time
Data Source
AI summary
A digital video communication device is provided. The digital video communication device includes a transmitter providing a spread-spectrum video signal including a predetermined frequency spread value and a frequency ratio and a receiver receiving the spread-spectrum video signal. The receiver includes a frequency synthesizer, a free-running clock generator configured to generate a free-running clock signal, wherein the free-running clock signal is used as a reference clock signal input to the frequency synthesizer. The receiver further includes a digital control logic circuit configured to separate the frequency ratio from the spread-spectrum video signal, and a line buffer coupled to the digital control logic circuit and the frequency synthesizer, the line buffer adjusting the frequency ratio and sending the adjusted frequency ratio to the frequency synthesizer, wherein the frequency synthesizer combines the free-running clock signal and the adjusted frequency ratio, and outputs a de-spread clock signal.