Physical Quantity Detection Circuit Time-Multiplexed Arithmetic
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Solution Overview
Problem
Existing physical quantity detection devices face challenges in achieving high detection accuracy and reliability under noisy environments while maintaining a cost-effective circuit scale, as simply replacing analog circuits with digital circuits leads to increased circuit complexity due to the need for more adders and multipliers.
Innovation Solution
A physical quantity detection circuit that digitizes detection signals using an A/D converter and performs arithmetic operations efficiently by sharing arithmetic units, such as adders and multipliers, to reduce circuit scale, and includes a control portion that manages various arithmetic processes like digital filtering and offset correction, utilizing counters and sensors to optimize calculations over multiple sampling periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the detection circuit is replaced by a digital circuit to improve detection accuracy, then measurement precision is improved, but device complexity increases due to increased number of adders and multipliers
Solution Approach 1:
The patent implements periodic action by dividing arithmetic operations into multiple phases within a sampling period. The counter circuit generates phase signals that sequentially control different arithmetic operations (filtering, offset correction, sensitivity correction) to be performed in distinct time slots, allowing time-multiplexed execution that reduces the number of simultaneous arithmetic units needed.
Solution Approach 2:
The patent applies dynamics by making the arithmetic circuit configuration adaptive through the control circuit. The control circuit dynamically selects and configures which arithmetic operations are performed in each phase based on the current sampling period requirements, allowing the same hardware to flexibly perform different functions at different times rather than requiring dedicated static circuits for each function.
2Productivity
If multiple arithmetic operation processes are performed simultaneously to improve processing speed, then productivity is improved, but device complexity increases due to requiring more arithmetic units
Solution Approach 1:
The patent uses periodic action to achieve high processing speed through time-multiplexed arithmetic operations. Within each sampling period, multiple arithmetic operations (filtering, offset correction, sensitivity correction) are performed sequentially in different phases controlled by the counter circuit, achieving complete processing without requiring all arithmetic units to operate simultaneously.
Solution Approach 2:
The patent applies preliminary action by performing arithmetic operations in a predetermined sequence within each sampling period. The control circuit is pre-configured to execute filtering operations first, followed by offset correction, then sensitivity correction, ensuring all necessary processing is completed within the sampling period without requiring parallel execution of all operations.
Data Source
AI summary
A detection circuit (physical quantity detection circuit) includes a ΔΣ modulator (A/D converter) that digitizes a detection signal corresponding to a physical quantity and outputs detection data, an arithmetic operating portion that includes at least one of adders and a multiplier, a main sequence counter (counter) that counts the number of clocks of a clock signal and initializes a count value periodically, and a control circuit (control portion) that causes the arithmetic operating portion to perform a plurality of arithmetic operation processes, having types different from each other, for generating arithmetic operation data according to a magnitude of the physical quantity on the basis of the detection data, in accordance with the count value.