Detector Cell Circuit for Low-LCE Successive Detection Log Amplifiers
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Solution Overview
Problem
Successive detection logarithmic amplifiers (SDLA) face a tradeoff between logarithmic conformance error (LCE), minimum input detectability, dynamic range (DR), and power consumption, with reducing gain per amplifier stage to improve LCE compromising DR and increasing stages for DR consuming more area and power.
Innovation Solution
A detector cell architecture with a linear transfer function that improves non-linearity, reducing LCE without affecting DR, area consumption, or power consumption, by using current source circuits and transistors with current mirrors to achieve a piecewise transfer function closely conforming to a non-linear logarithmic function.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If gain per amplifier stage is reduced to improve logarithmic conformance error, then LCE is improved, but dynamic range is compromised
Solution Approach 1:
The amplifier is divided into multiple cascaded stages, each with moderate gain, rather than using a single high-gain stage. This segmentation allows the overall system to achieve high dynamic range while each individual stage operates in its linear region, improving logarithmic conformance.
Solution Approach 2:
The detector cell uses a linear transfer function that dynamically adapts to different input signal levels, transitioning between different operational regions to maintain both accuracy and dynamic range across varying signal conditions.
2Adaptability or versatility
If number of amplifier stages is increased to improve dynamic range, then dynamic range is improved, but area consumption and power consumption increase
Solution Approach 1:
Multiple amplifier stages are merged into a single cascaded architecture where each stage shares common biasing and control circuits, reducing the total area consumption compared to independent amplifier stages.
Solution Approach 2:
The detector cell circuit performs multiple functions including detection, linearization, and signal conditioning in a single integrated block, eliminating the need for separate circuits and reducing overall area consumption.
3Adaptability or versatility
If number of amplifier stages is increased to improve dynamic range, then dynamic range is improved, but power consumption increases
Solution Approach 1:
Multiple amplifier stages share common biasing circuits and control logic, reducing the total power consumption compared to fully independent amplifier stages.
Solution Approach 2:
The amplifier uses periodic switching and sampling techniques to reduce average power consumption while maintaining the required dynamic range performance.
Data Source
AI summary
An example detector cell includes a first current source circuit having a terminal. The detector cell includes a first transistor having a control terminal, a first terminal, and a second terminal coupled to the terminal of the first current source circuit. The detector cell includes a second current source circuit having a terminal coupled to the first terminal of the first transistor. The detector cell includes a first current mirror having a first terminal and a second terminal, the first terminal coupled to the terminal of the second current source circuit and the first terminal of the first transistor. The detector cell includes a second transistor having a control terminal, a first terminal, and a second terminal coupled to the terminal of the first current source circuit. The detector cell includes a third current source circuit having a terminal coupled to the first terminal of the second transistor. The detector cell includes a second current mirror having a first terminal coupled to the terminal of the third current source circuit and the first terminal of the second transistor and a second terminal coupled to the second terminal of the first current mirror.