Detector Pin Layout for Low-Inductance High-Speed Sensing
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Solution Overview
Problem
Existing detector packaging designs using pins in scanning electron microscopes (SEMs) face issues with parasitic inductance, which limit the maximum operating speed and restrict the use of high-frequency ranges, thereby impeding high-speed imaging and reducing throughput.
Innovation Solution
A detector package design that alternately arranges groups of pins, with opposite current directions, to reduce or cancel out magnetic fields, minimizing parasitic inductance and enhancing high-speed operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional pin packaging is used for detector connections, then ease of manufacture and assembly is improved, but parasitic inductance increases limiting operating speed
Solution Approach 1:
The patent applies asymmetry by strategically positioning pins at different distances from the sensing element. Specifically, at least one pin is positioned closer to the sensing element than others, creating an asymmetric arrangement that reduces the loop area for current flow. This asymmetric positioning minimizes parasitic inductance while maintaining the mechanical advantages of pin-based packaging, thereby enabling higher operating speeds without sacrificing ease of assembly.
2Ease of operation
If pins are used for electrical connection, then ease of operation and maintenance is improved, but magnetic field interference increases
Solution Approach 1:
The asymmetric pin positioning reduces the effective loop area through which current flows, thereby minimizing the magnetic field generated according to electromagnetic induction principles. By placing at least one pin closer to the sensing element, the current path is optimized to reduce magnetic field interference while maintaining pin-based connectivity for ease of operation and maintenance.
3Device complexity
If conventional detector packaging is used, then device complexity is reduced, but frequency range operation is limited
Solution Approach 1:
The patent introduces a modified pin arrangement that maintains relatively simple packaging while optimizing for high-frequency performance. By positioning at least one pin closer to the sensing element in an asymmetric configuration, the design reduces parasitic inductance without requiring complete redesign of the packaging structure, thus balancing device simplicity with high-frequency reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces parasitic inductance, allowing for faster detector operation and improved throughput by maintaining the benefits of using pins while minimizing electromagnetic interference.
Implementation Method 1
the sets of pins are arranged with a symmetry such that magnetic fields generated when current passes through the sets of pins is reduced due to the symmetry
Data Source
AI summary
A charged particle beam system may include a detector. A package for a detector may have a package body that includes two sets of pins, each of the sets of pins including two pins. Each pin of the sets of pins may be configured to be connected to one of two terminals of a sensing element. Pins of different sets may be configured to be connected to a different one of the two terminals of the diode. The sets of pins may be arranged with a symmetry such that magnetic fields generated when current passes through the sets of pins is reduced due to the symmetry.