Detector Wiring Control for Faster Signal Readout
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Solution Overview
Problem
The reading speed of signals in a detector is limited by parasitic capacitance between signal wirings, which changes due to differences in electric potential during reset and charge transfer operations.
Innovation Solution
A detector design with a control portion that adjusts the potential of adjacent dummy wirings to match the signal potential, reducing parasitic capacitance and enhancing reading speed by synchronizing the potential of these dummy wirings with the signal wirings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If signal wirings are disposed adjacent to each other to reduce wiring complexity, then device complexity is reduced, but parasitic capacitance between signal wirings increases, limiting reading speed
Solution Approach 1:
A dummy wiring is introduced as an intermediary element between adjacent signal wirings. This dummy wiring carries a dummy signal that is in phase with the signal on the signal wiring, thereby reducing the potential difference and parasitic capacitance effect between adjacent signal wirings, which improves reading speed without increasing wiring complexity
Solution Approach 2:
The potential of the dummy wiring is dynamically changed to match the potential of the adjacent signal wiring during operation. By changing the electrical parameter (potential) of the dummy wiring to be in phase with the signal wiring, the parasitic capacitance effect is reduced, allowing faster signal reading
2Speed
If dummy wirings are disposed adjacent to signal wirings to reduce parasitic capacitance, then reading speed is improved, but fixed pattern noise increases due to potential differences during reset and charge transfer operations
Solution Approach 1:
The potential of the dummy wiring is controlled based on feedback from the signal wiring potential. The control circuit monitors the potential of the signal wiring and adjusts the dummy wiring potential accordingly to maintain phase alignment, thereby reducing parasitic capacitance effects while minimizing fixed pattern noise through continuous adjustment
Solution Approach 2:
The dummy wiring potential is made dynamic rather than static. The control circuit dynamically adjusts the dummy wiring potential to follow the signal wiring potential changes during different operation phases (reset and charge transfer), allowing the system to adapt to varying electrical conditions and reduce noise while maintaining high reading speed
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution increases the reading speed of signals by minimizing parasitic capacitance and reducing fixed pattern noise, thereby improving the performance and reliability of the detector.
Implementation Method 1
Each pixel includes a detection diode that converts energy to electric charge
Implementation Method 2
the parasitic capacitance between the signal wiring and the wiring produced when the electric charge is read changes from the parasitic capacitance between the signal wiring and the wiring produced in the reset operation
Data Source
AI summary
A detector includes a plurality of first pixels, a signal wiring group, a first wiring, and a control portion. The plurality of first pixels are arranged in a column direction. The signal wiring group is disposed in a first wiring layer. The signal wiring group includes a plurality of signal wirings adjacent to each other. Signals are respectively outputted from the plurality of first pixels to the plurality of signal wirings. The first wiring is disposed in the first wiring layer and adjacent to the signal wiring group. The control portion is configured to control potential of the first wiring such that the potential of the first wiring follows potential of a signal transmitted through the signal wiring group.