Deterministic Progress Index Lock Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In multi-processor computing environments, existing systems face challenges in efficiently managing thread execution order and minimizing waiting times for priority threads due to complex verification costs and performance deterioration from non-deterministic execution sections, especially in imbalanced lock acquisition patterns.
Innovation Solution
A lock controlling apparatus and method based on a deterministic progress index (DPI) that loads and compares DPIs across cores, assigns locks based on core DPI values and IDs, and corrects DPIs using measurement values to ensure deterministic thread scheduling and minimize waiting overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-processor computing technology is introduced to improve system performance and energy efficiency, then processing capability increases, but verification cost increases in proportion to the square of the number of cores
Solution Approach 1:
The patent introduces a deterministic progress index (DPI) parameter that quantifies the execution progress of each thread. By changing the parameter from simple timestamp-based ordering to DPI-based ordering, the system achieves deterministic execution order in multi-processor environments. The DPI is calculated based on the number of instructions executed and the deterministic section ratio, transforming the verification problem into a manageable parameter comparison task that reduces verification cost while maintaining high productivity.
2Reliability
If thread execution order is maintained to be constant to ensure deterministic execution, then execution characteristic determinism improves, but waiting time for priority threads increases
Solution Approach 1:
The patent implements dynamic thread scheduling based on DPI values. Instead of static execution order, the system dynamically adjusts thread execution priority by comparing DPI values at lock acquisition points. The controller determines which thread should acquire the lock next by evaluating their respective DPI values and priority levels, allowing high-priority threads to be scheduled earlier when appropriate while maintaining deterministic execution characteristics. This dynamic approach reduces waiting time for priority threads without sacrificing execution determinism.
3Ease of manufacture
If existing lock acquisition methods are used in multi-processor environments, then implementation simplicity is maintained, but performance deteriorates due to non-deterministic execution sections
Solution Approach 1:
The patent introduces DPI as an intermediary mechanism between the thread execution and lock acquisition processes. Rather than directly implementing complex deterministic scheduling logic in the lock acquisition protocol, the system uses DPI values as a mediator to determine execution order. The loading unit loads DPI values, the comparison unit compares them, and the controller uses these comparisons to make scheduling decisions. This intermediary approach maintains implementation simplicity while significantly improving performance by eliminating non-deterministic behavior in multi-processor environments.
Data Source
AI summary
Provided is a method and apparatus for ensuring a deterministic execution characteristic of an application program to perform data processing and execute particular functions in a computing environment using a micro architecture. A lock controlling apparatus based on a deterministic progress index (DPI) may include a loading unit to load a DPI of a first core and a DPI of a second core among DPIs of a plurality of cores at a lock acquisition point in time of each thread, a comparison unit to compare the DPI of the first core and the DPI of the second core, and a controller to assign a lock to a thread of the first core when the DPI of the first core is less than the DPI of the second core and when the second core corresponds to a last core to be compared among the plurality of cores.


