Deterministic Shuffling Networks for Parallel Stochastic Computing
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Solution Overview
Problem
Stochastic computing faces high latency and errors due to random fluctuations and correlations in bit streams, which worsen with increasing circuit depth and number of inputs, and is resource-intensive for generating random bit streams.
Innovation Solution
Implementing deterministic shuffling and sub-sampling techniques to generate inputs for stochastic logic, using thermometer encoding and direct mapping to reduce errors and resource usage, allowing for parallel computation with reduced area and delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If random or pseudorandom bit streams are generated for stochastic computation, then computation can be performed with simple logic, but the circuit area increases significantly due to random number generators
Solution Approach 1:
The patent extracts the random number generator component from the stochastic computation system and replaces it with a deterministic bit stream generator. This removes the source of randomness while maintaining the stochastic computation paradigm, thereby reducing circuit area without sacrificing the simplicity of stochastic logic operations
Solution Approach 2:
The patent changes the fundamental parameter of the input bit stream from random/pseudorandom to deterministic. By using deterministic sequences with controlled statistical properties, the system maintains stochastic computation benefits while eliminating the area overhead of random number generators
2Measurement precision
If longer bit streams are used to maintain accuracy in stochastic computation, then computation accuracy improves, but latency increases
Solution Approach 1:
The patent applies preliminary action by pre-generating deterministic bit streams with controlled lengths and statistical properties before computation. This allows the system to use shorter bit streams while maintaining accuracy, as the deterministic sequences are designed to achieve convergence faster than random sequences
Solution Approach 2:
The patent employs periodic action through deterministic sequences that repeat with controlled periods. This periodic structure allows for shorter effective bit stream lengths while maintaining statistical properties necessary for accurate stochastic computation, thereby reducing latency
3Measurement precision
If re-randomization of bit streams is performed to maintain accuracy, then computation accuracy is maintained, but additional circuit resources and area are consumed
Solution Approach 1:
The patent extracts and removes the re-randomization stage from the stochastic computation pipeline. By using deterministic bit streams from the outset, the system eliminates the need for intermediate re-randomization operations, reducing both circuit area and complexity while maintaining accuracy
4Adaptability or versatility
If circuit depth and number of inputs increase, then computational capability improves, but errors due to random fluctuations and correlations worsen
Solution Approach 1:
The patent changes the parameter of input stream characteristics from random to deterministic. This fundamental parameter change eliminates random fluctuations and correlations that cause errors in deep circuits, allowing increased circuit depth and input count while maintaining reliability
Data Source
AI summary
In some examples, a device includes shuffling circuitry configured to receive an input unary bit stream and generate a shuffled bit stream by selecting n-tuple combinations of bits of the input unary bit stream. The device also includes stochastic logic circuitry having a plurality of stochastic computational units configured to perform operations on the shuffled bit stream in parallel to produce an output unary bit stream, each of the stochastic computational units operating on a different one of the n-tuple combinations of the bits.