Deterministic Traffic Scheduling with Jitter-Aware Time Slots
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Solution Overview
Problem
In deterministic traffic transmission, intra-node jitter is significant due to non-integral multiple cycles of packet sending and large latency jitter between components, leading to inefficiencies in scheduling and resource allocation.
Innovation Solution
A method and device that determine a target time slot number based on packet arrival time, using a time slot schedule cycle mapping table to absorb intra-node jitter by scheduling packets to a corresponding cycle schedule queue, thereby reducing jitter and enhancing scheduling efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If packets are scheduled using fixed cycle queues based on CSQF, then deterministic transmission latency is ensured, but intra-node jitter accumulates due to non-integral multiple cycles and large latency jitter between components
Solution Approach 1:
The patent transforms the static fixed cycle queue scheduling into a dynamic time slot-based scheduling mechanism. Instead of assigning packets to fixed cycle queues based on predetermined cycles, the system dynamically determines target time slots based on actual packet arrival times and maps them to appropriate cycle schedule queues using a mapping table that accounts for intra-node jitter characteristics. This dynamic adaptation allows the system to maintain deterministic latency guarantees while compensating for jitter accumulation.
Solution Approach 2:
The patent introduces a time slot schedule cycle mapping table as an intermediary layer between packet arrival and queue scheduling. This mapping table acts as a buffer that absorbs intra-node jitter by mapping time slots to cycle queues in a way that compensates for jitter effects. The mapping table translates the dynamic packet arrival pattern into the static cycle queue structure, mediating between the two and preventing jitter accumulation while maintaining deterministic transmission properties.
2Ease of operation
If the network node uses traditional CSQF scheduling without time slot mapping, then the scheduling process is simple, but scheduling efficiency and resource utilization deteriorate due to jitter
Solution Approach 1:
The patent performs preliminary actions by pre-calculating and storing the time slot to cycle queue mappings in a mapping table before actual packet scheduling occurs. The mapping table is constructed in advance based on the network node's intra-node jitter characteristics and cycle queue configurations. This preliminary preparation allows the scheduling process to simply look up mappings without complex real-time calculations, maintaining operational simplicity while improving scheduling efficiency through optimized resource allocation.
Data Source
AI summary
A Deterministic Traffic (DT) transmission method and device is provided. The method includes: in a case where it is determined that a received packet belongs to a DT, and the packet does not carry Cycle Specified Queuing and Forwarding (CSQF) domain schedule information, determining a target time slot number corresponding to an arrival time of the packet; according to the target time slot number, querying a time slot schedule cycle mapping table at an egress interface for the packet, and determining a target cycle schedule queue corresponding to the target time slot number, where the time slot schedule cycle mapping table is determined based on intra-node jitter at the network node, and is used to record a mapping relationship between a time slot number and a cycle schedule queue number; scheduling the packet to the target cycle schedule queue at the egress interface for the packet.