Deterministic Write Latency in PCIe NVMe Storage Systems
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional PCIe NVMe based SSDs experience non-deterministic write latency due to shared PCIe bus usage, leading to unpredictable performance in managing write commands.
Innovation Solution
A data storage system with a host containing a write buffer, memory region, and submission queue, where the driver transfers data to the memory region and generates a write command completion notice, allowing for deterministic write latency by releasing the memory region after data transfer, enabling efficient data management and reduced latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the conventional PCIe NVMe based SSDs use shared PCIe bus for data transfer, then the system can support multiple components, but the write latency becomes non-deterministic and unpredictable
Solution Approach 1:
The patent segments the data transfer process into two independent phases: (1) host-to-memory transfer completed by the driver, and (2) memory-to-storage device transfer initiated by the storage device. This segmentation allows the driver to provide deterministic completion notices for the first phase without waiting for the second phase, resolving the latency non-determinism while preserving shared PCIe bus usage.
Solution Approach 2:
The driver performs preliminary action by transferring data to the memory region and generating the write command completion notice before the storage device actually reads the data from memory. This preliminary completion notice provides deterministic latency information to the application, while the storage device subsequently performs the actual data retrieval at its own pace.
2Reliability
If the driver waits for storage device to fetch data from memory region before posting completion, then data accuracy is ensured, but write latency increases and becomes unpredictable
Solution Approach 1:
The driver performs the data transfer to memory and posts the completion notice in advance, before the storage device fetches the data. This preliminary action ensures reliability because the driver confirms successful memory writing, while avoiding the latency penalty of waiting for the storage device's subsequent data retrieval operation.
Solution Approach 2:
The system uses feedback mechanisms where the storage device notifies the driver when it has obtained data from the memory region, allowing the driver to release the memory region appropriately. This feedback loop maintains data integrity while enabling the driver to provide timely completion notices.
3Device complexity
If the memory region is held until data is obtained by storage device, then resource management is simplified, but write latency increases
Solution Approach 1:
The storage device provides feedback to the driver by notifying when it has obtained data from the memory region. This feedback enables the driver to release the memory region at the appropriate time, balancing resource management simplicity with latency reduction by not holding the memory region unnecessarily long.
Solution Approach 2:
The driver releases the memory region as a preliminary action after posting the completion notice, rather than waiting for the storage device to finish fetching data. This preliminary release reduces latency while the feedback mechanism ensures proper resource management.
Data Source
AI summary
A data storage system includes a host having a write buffer, a memory region, a submission queue and a driver therein. The driver is configured to: (i) transfer data from the write buffer to the memory region in response to a write command, (ii) generate a write command completion notice; and (iii) send at least an address of the data in the memory region to the submission queue. The host may also be configured to transfer the address to a storage device external to the host, and the storage device may use the address during an operation to transfer the data in the memory region to the storage device.