Deuterium Plasma Treatment for Semiconductor Interface Reliability
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Solution Overview
Problem
High-temperature deposition processes in semiconductor fabrication lead to the formation of Si—H bonds, which can cause hot carrier injection (HCI) and negative bias temperature instability (NBTI) phenomena, deteriorating the operational characteristics of semiconductor devices.
Innovation Solution
A plasma process using a non-silane gas containing deuterium is employed to replace Si—H bonds with Si-D bonds, reducing the occurrence of HCI and NBTI phenomena by penetrating into the interface between the substrate and the gate dielectric layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If high-temperature deposition processes are used to form dielectric layers and silicide layers, then manufacturing capability and device functionality are achieved, but Si-H bonds are formed on substrate and gate dielectric layer surfaces, leading to HCI and NBTI phenomena that deteriorate device operational characteristics
Solution Approach 1:
A plasma treatment process is performed before high-temperature deposition to pre-treat the substrate surface, reducing the formation of harmful Si-H bonds during subsequent deposition processes. This preliminary action prevents the root cause of HCI and NBTI phenomena.
Solution Approach 2:
The patent utilizes controlled plasma treatment to intentionally introduce deuterium or modify hydrogen content at the interface, converting the harmful effect of hydrogen-related bonds into a beneficial state where deuterium-passivated interfaces reduce carrier injection and ion migration, thereby improving device reliability.
2Productivity
If thermal energy is applied to the substrate during subsequent processes, then deposition and processing can proceed, but Si-H bonds are destroyed leading to H+ ion movement toward the gate electrode and threshold voltage changes
Solution Approach 1:
The patent changes the chemical composition parameter at the interface by introducing deuterium through plasma treatment, replacing hydrogen with deuterium in the interface bonds. This parameter change makes the bonds more resistant to thermal degradation, preventing H+ ion migration and threshold voltage instability during subsequent thermal processes.
3Reliability
If multiple plasma processes are performed to treat the interface, then device reliability is improved, but process complexity and manufacturing time increase
Solution Approach 1:
The patent combines multiple plasma treatment steps into a single integrated plasma process that achieves both surface cleaning and deuterium passivation simultaneously. This merging of functions reduces the total number of process steps while maintaining the reliability benefits of comprehensive interface treatment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the reliability and operational characteristics of semiconductor devices by stabilizing the interface and reducing the formation of detrimental hydrogen ions, thereby minimizing changes in threshold voltage and enhancing device performance.
Implementation Method 1
A plasma process is performed on the interface between the gate oxide layer and the substrate using a non-silane treatment gas including deuterium
Implementation Method 2
A plasma process using a non-silane gas containing deuterium is employed to replace Si—H bonds with Si-D bonds
Data Source
AI summary
Semiconductor devices are fabricated using a plasma process with a non-silane gas that includes deuterium, and which may result in improved device reliability and/or other improved device operational characteristics. One such method can include forming a gate oxide layer on a transistor region, which is defined on a substrate, and forming a gate electrode on the gate oxide layer. An etch stop layer is formed on the gate oxide layer and the gate electrode. A plasma process is performed on the interface between the gate oxide layer and the substrate using a non-silane treatment gas including deuterium. An interlayer dielectric layer is formed on the etch stop layer. A bottom metal line is formed on the interlayer dielectric layer.