Network Device Clock Synchronization via Processing Time Compensation

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Solution Overview

Problem

The synchronization of internal clocks in networked devices is compromised by varying internal processing times, particularly due to encryption and decryption processes, leading to reduced accuracy and transmission rate over network connections.

Innovation Solution

A buffer unit is implemented within each node to estimate and compensate for the maximum internal processing time, ensuring that timestamps are incorporated close to the frame's transmission time, thereby minimizing the impact of processing variations on clock synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If cryptographic techniques (encryption/decryption) are applied to frames for security, then security is improved, but internal processing time varies leading to reduced synchronization accuracy

Engineering Contradiction:
ImprovesecurityVSAvoidsynchronization accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing the maximum processing time for cryptographic operations in a lookup table. This allows the system to compensate for variable processing times in advance, ensuring that timestamp reflections accurately represent transmission times even when encryption/decryption durations vary.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements beforehand cushioning by introducing a buffer time based on the maximum processing time from the lookup table. This buffer compensates for the variability in cryptographic processing, cushioning the impact of encryption/decryption time variations on synchronization accuracy.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Speed

If internal processing time is reduced for faster transmission, then transmission speed is improved, but security processing (encryption/decryption) may be compromised

Engineering Contradiction:
Improvetransmission speedVSAvoidsecurity processing quality
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent uses an intermediary approach by introducing a lookup table that mediates between security requirements and transmission speed. The lookup table stores pre-calculated maximum processing times that allow the system to maintain security processing quality while compensating for time variations in synchronization calculations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If timestamps are taken at frame generation time, then synchronization accuracy is improved, but processing time variations affect the actual transmission time representation

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidprocessing time variation
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies feedback by using the lookup table to provide compensatory time adjustments based on the actual processing time requirements. The system retrieves the maximum processing time from the lookup table and uses it to adjust timestamp reflections, ensuring accurate representation of transmission times despite processing variations.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20240364664A1Device and a method for the device
Publication Date: 2024.10.31 NXP BV
  • US20240364664A1 patent drawing
  • US20240364664A1 patent drawing
  • US20240364664A1 patent drawing

AI summary

The present invention relates to device for compensating variations in run time of a word of a frame. The invention also relates to a method for the device.