Programmable Device Configuration Retiming Optimization
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Solution Overview
Problem
Current configuration methods for programmable integrated circuit devices do not adequately account for retiming, leading to suboptimal performance due to insufficient registers in certain paths, which can hinder the ability to optimize circuit designs for higher clock speeds.
Innovation Solution
A method that involves placing and routing user logic designs, retiming them, and rerouting to find additional registers for paths lacking sufficient capacity, while maintaining circuit operability and adhering to architectural constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If retiming is applied to optimize clock speed, then timing performance is improved, but paths may lack sufficient registers for retiming
Solution Approach 1:
The patent applies rerouting in the spatial dimension to resolve register scarcity. When retiming identifies paths needing additional registers but none are available, the system creates alternative routing paths through the device, effectively adding capacity by changing the geometric arrangement rather than increasing the total number of registers. This dimensional approach allows the same limited registers to be distributed more effectively across different spatial paths.
Solution Approach 2:
The patent changes the routing parameters and register distribution parameters to enable retiming. By adjusting how logic elements are connected and how registers are allocated across different paths, the system can achieve better timing performance. The configuration compiler modifies routing parameters dynamically to ensure sufficient register availability in critical paths while maintaining overall device functionality.
2Speed
If registers are moved forward in pipelined paths for retiming, then timing performance is improved, but architectural constraints may prevent sufficient retiming
Solution Approach 1:
The patent introduces dynamic adaptability to handle architectural constraints. The retiming process is made flexible and iterative, allowing the system to adapt to varying register availability and path constraints. When forward retiming is blocked by architectural limitations, the system dynamically adjusts by applying retiming in alternative directions or through alternative paths, transforming a static constraint problem into a dynamic optimization process.
Solution Approach 2:
The patent implements feedback mechanisms where the retiming process continuously monitors register availability and path constraints. When architectural constraints prevent optimal retiming in certain paths, the system receives feedback about these limitations and adjusts its retiming strategy accordingly. This feedback loop enables the compiler to identify and address timing issues in subsequent iterations while respecting device architectural boundaries.
3Manufacturing precision
If configuration methods optimize by detecting longest delay paths, then timing optimization is achieved, but retiming capabilities are not properly accounted for
Solution Approach 1:
The patent makes the configuration compiler multi-functional by integrating both traditional delay-path optimization and modern retiming capabilities. The same compiler infrastructure that detects and optimizes longest delay paths is enhanced to also perform register analysis, retiming optimization, and routing adjustment. This universal approach eliminates the need for separate tools and ensures that timing optimization and retiming capability work together synergistically rather than in conflict.
Data Source
AI summary
A method of configuring an integrated circuit device with a user logic design includes placing and routing the user logic design, retiming the placed and routed user logic design, examining the retimed user logic design for at least one path that lacks sufficient registers for retiming, and rerouting the user logic design to find additional registers for further retiming the at least one path. Portions of the method may be performed iteratively until a condition, which may be a performance criterion, is met. The method may further include assuming the paths that are constrained have been repaired, and examining further paths downstream from those paths.