Electronic Device Testing Circuit Merging On-Resistance and Calibration
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Solution Overview
Problem
Integrated circuit testing methods are inefficient and costly due to the need for multiple standalone tests, high current pulses, and extensive resources, leading to device damage and low measurement accuracy.
Innovation Solution
A method and apparatus that merge tests to measure on-resistance and calibrate current detect mechanisms using a single current pulse, reducing the number of high current pulses and external components, and improving measurement accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple standalone tests are performed to measure on-resistance and calibrate current detect mechanisms, then measurement accuracy is improved, but test time and device damage risk increase
Solution Approach 1:
The patent combines multiple standalone tests (on-resistance measurement and current detect mechanism calibration) into a single integrated test procedure. The test system performs both measurements simultaneously using a single current pulse, eliminating the need for separate test sequences and reducing overall test time while maintaining measurement accuracy through dedicated measurement circuits.
Solution Approach 2:
The patent implements preliminary switching actions before the current pulse is applied. Switches are pre-configured to route signals to appropriate measurement circuits, and the test system is prepared in advance to capture both on-resistance and current detect calibration data from the same current pulse event, enabling efficient simultaneous measurement.
2Measurement precision
If multiple high current pulses are used for testing, then measurement accuracy is improved, but device damage likelihood increases
Solution Approach 1:
The patent merges multiple measurement functions into a single current pulse event. By simultaneously measuring on-resistance and calibrating the current detect mechanism during one pulse, the total number of high current pulses is reduced, thereby maintaining measurement accuracy while minimizing cumulative stress and damage risk to the device under test.
3Adaptability or versatility
If multiple standalone tests are performed, then comprehensive device characterization is achieved, but equipment complexity and costs increase
Solution Approach 1:
The patent implements a universal test system that can perform multiple measurement functions (on-resistance measurement, current detect calibration) using a single integrated test circuit. The system uses multi-functional switches and measurement circuits that can be reconfigured through software control to perform different measurements, eliminating the need for separate dedicated test equipment for each measurement type.
Solution Approach 2:
The patent combines multiple test functions into a single integrated test apparatus. The measurement system includes shared components such as current sources, voltage measurement circuits, and control logic that can execute multiple test sequences, reducing overall equipment complexity and cost while maintaining comprehensive device characterization capability.
4Measurement precision
If extensive external components are used for testing, then measurement accuracy is improved, but device complexity and test setup time increase
Solution Approach 1:
The patent integrates measurement functions that previously required separate external components into a unified test circuit. The system combines on-resistance measurement and current detect calibration circuits into a single integrated architecture, reducing the number of external components needed while maintaining measurement precision through coordinated signal routing and processing.
Data Source
AI summary
Methods and apparatus to test electronic devices are disclosed. An example method includes setting a first controlled switch to prevent a current detect signal from tripping an overcurrent protection event controlling an operation of the device; setting a second controlled switch to route a first sensed voltage associated with the device to a voltage adjuster; sending a calibration current corresponding to a target threshold current through the device; detecting the first sensed voltage while the calibration current flows through the device; and setting a reference signal substantially equal to the first sensed voltage, wherein the reference signal is to be used to generate the current detect signal.


