DFE Error Correction for Burst Errors in High-Speed Links

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Solution Overview

Problem

Decision feedback equalizers (DFEs) in high-speed communication systems suffer from bit error transfer, leading to increased bit error rates due to erroneous decisions, which are not effectively addressed by existing equalization methods.

Innovation Solution

An error correction apparatus and method that detects the symbol location of burst errors in DFE decision signals, using bit error transfer features to correct erroneous decisions, thereby reducing bit error rates and improving equalization performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a decision feedback equalizer (DFE) is used to equalize input signals, then equalization performance is improved, but bit error rate increases due to bit error transfer from erroneous decisions

Engineering Contradiction:
Improveequalization performanceVSAvoidbit error rate
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent applies feedback by using the decision signal from the DFE to generate a feedback signal that is added to the equalized output signal. This feedback mechanism allows the system to compensate for ISI while using the decision information to improve equalization, thereby maintaining equalization performance while addressing bit error transfer through the error correction mechanism.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces an intermediary error correction mechanism that sits between the DFE decision maker and the final output. This intermediary component detects and corrects bit errors caused by erroneous decisions, allowing the DFE to operate at high equalization performance while the error correction layer mitigates the bit error rate increase.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If feedback equalization is applied to remove ISI, then signal quality is improved, but noise amplification occurs

Engineering Contradiction:
Improvesignal qualityVSAvoidnoise amplification
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by selectively applying feedback only to the extent necessary for equalization while using error correction to address only the specific locations where bit errors occur. This localized approach allows noise reduction through feedback while avoiding unnecessary noise amplification in error-free regions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The error correction mechanism acts as an intermediary that filters out noise-amplified erroneous decisions from the feedback path. By correcting errors before they propagate, the system maintains the beneficial noise-reduction effects of feedback equalization while preventing noise amplification from erroneous decisions.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If DFE decision signals are used for equalization, then equalization speed is improved, but bit error transfer increases

Engineering Contradiction:
Improveequalization speedVSAvoidbit error transfer
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by performing error correction on the decision signal before it is used for further processing or transmission. The error correction mechanism proactively identifies and corrects bit errors in the DFE decision signal, preventing bit error transfer before it can propagate through the system while maintaining fast equalization speed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The feedback mechanism uses the corrected decision signal to generate feedback for equalization, creating a virtuous cycle where fast decision-making is maintained while error correction ensures reliability. The feedback path operates at full speed using corrected decisions, preventing bit error transfer while preserving equalization speed.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3713167B1Error correction method and error correction apparatus
Publication Date: 2025.01.08 HUAWEI TECH CO LTD
  • EP3713167B1 patent drawingFigure 1~2(d)
  • EP3713167B1 patent drawingFigure 3(a)~3(b)
  • EP3713167B1 patent drawingFigure 4(a)~4(b)

AI summary

This application provides an error correction method and an error correction apparatus, relates to the field of communications technologies, so as to reduce a bit error rate of a DFE and improve equalization performance. The method includes: obtaining a decision signal of a decision feedback equalizer DFE; obtaining at least one of an input signal, an equalized output signal, and a difference of the DFE, where the difference is a difference between a level value of the decision signal and a level value of the equalized output signal; determining a symbol location of an end of burst error of the decision signal based on detection of at least one of the decision signal, the equalized output signal, and the difference; and when the symbol location is detected, performing error correction on the decision signal based on the at least one of the input signal, the equalized output signal, and the difference.