DFE Common-Mode Tracking for Stable Adaptation Convergence
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Solution Overview
Problem
In decision feedback equalization (DFE) implementations, especially in current mode logic (CML), the increasing common mode voltage due to feedback coefficients impedes the convergence of DFE adaptation, as it affects the output of error sense amplifiers, making them dependent on both differential signal amplitude and common mode differences.
Innovation Solution
A feedback technique is employed to track the reference signal with the DFE summing node common mode voltage, shifting both differential signals equally and compensating for RC effects by matching RC characteristics in the circuitry generating reference voltages, ensuring the reference common mode changes without affecting the differential mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If DFE feedback coefficients are increased to improve ISI removal, then the common mode voltage increases, but the error sense amplifier output becomes dependent on common mode difference rather than only differential signal amplitude
Solution Approach 1:
A feedback circuit is implemented that senses the common mode voltage at the summing node and adjusts the reference signal common mode voltage accordingly. This feedback mechanism ensures that the error sense amplifier always compares differential signals with a reference that has matching common mode voltage, eliminating the harmful dependence on common mode differences while allowing DFE feedback coefficients to be increased for improved ISI removal.
Solution Approach 2:
The patent maintains equipotentiality between the summing node and reference signal by dynamically adjusting the reference common mode voltage to match the summing node common mode voltage. This is achieved through feedback circuitry that continuously monitors and equalizes the common mode levels, ensuring that the error sense amplifier operates with zero common mode difference regardless of the DFE feedback coefficient values.
2Device complexity
If a fixed reference signal common mode is used to simplify circuit design, then the circuit complexity is reduced, but the DFE adaptation convergence is impeded when common mode voltage changes
Solution Approach 1:
Instead of using a fixed reference signal common mode, the patent implements a feedback mechanism that dynamically adjusts the reference common mode voltage based on the summing node common mode voltage. This feedback approach adds minimal circuit complexity while ensuring reliable DFE adaptation convergence by maintaining matching common mode levels between the summing node and reference signal under all operating conditions.
3Reliability
If feedback technique is used to track reference signal with DFE summing node common mode voltage, then common mode difference is reduced, but RC effects may cause differential nodes to receive signals at different times
Solution Approach 1:
The patent addresses RC effects by carefully selecting and matching the electrical characteristics (resistance and capacitance values) of the feedback circuit components. By adjusting these parameters, the circuit is designed to minimize timing skew between differential nodes while maintaining effective common mode voltage tracking, thus achieving both reliable common mode tracking and precise differential signal timing alignment.
Data Source
AI summary
In an embodiment of the present invention, a feedback technique is used to track a reference signal with a DFE summing node common mode voltage. For example, in an embodiment implemented in CML, the feedback signal shifts both differential signals (e.g., the summing node common voltage and the reference voltage) by the same amount. In such an embodiment, the feedback technique preferably changes the reference common mode but not its differential mode.