Decision Feedback Equalizer With CTLE for Backplane ISI
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Solution Overview
Problem
The bandwidth limitation of existing backplanes hinders the ability to meet the increasing demand for high data rate wireline transmission.
Innovation Solution
A transceiver employing a combination of Tx pre-emphasis, advanced Rx continuous time linear equalizer (CTLE), and decision feedback equalizer (DFE) is used, with a novel sign zero-forcing adaptation algorithm to adapt the taps and minimize inter-symbol interference, utilizing digital programmability and ring oscillators for clock generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional equalization methods are used, then bandwidth limitations are not effectively compensated, but power consumption and circuit complexity increase
Solution Approach 1:
The patent changes the operational parameters of the equalizer by using a continuous-time architecture with fixed coefficients instead of adaptive discrete-time equalization. This parameter change allows the equalizer to effectively compensate for bandwidth limitations while consuming less power, as it avoids the complex adaptive algorithms and high-speed switching required in conventional methods
Solution Approach 2:
The patent substitutes the mechanical/adaptive control system with a continuous-time analog equalization system. By replacing discrete adaptive algorithms with continuous-time fixed-coefficient equalization, the system achieves effective bandwidth compensation without the power consumption overhead of adaptive decision-directed algorithms
2Reliability
If inductors are used in the equalizer circuit, then equalization performance improves, but layout area increases
Solution Approach 1:
The patent extracts and removes the inductor component from the equalizer circuit entirely. By using a continuous-time linear equalizer implemented with resistors, capacitors, and transconductance amplifiers, the design achieves effective equalization performance without requiring any inductors, thereby significantly reducing the layout area
Solution Approach 2:
The patent replaces expensive, area-consuming inductor components with cheaper, smaller passive components like resistors and capacitors. This substitution maintains equalization performance while dramatically reducing the physical footprint of the circuit on the chip
3Reliability
If adaptive algorithms are used to minimize inter-symbol interference, then transmission reliability improves, but device complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-calculating and fixing the equalizer coefficients during manufacturing or initialization based on expected channel characteristics. This eliminates the need for complex real-time adaptive algorithms, reducing device complexity while maintaining transmission reliability through predetermined optimal equalization
Solution Approach 2:
The continuous-time equalizer structure inherently provides self-service by automatically adapting to channel conditions through its continuous operation mode. The fixed-coefficient continuous-time architecture naturally compensates for inter-symbol interference without requiring external adaptive control mechanisms, thereby reducing overall system complexity
Data Source
AI summary
A decision feedback equalizer, transceiver, and method are provided, the equalizer having at least one comparator, the at least one comparator comprising a first stage, comprising a main branch having two track switches with a resistive load, an offset cancellation branch, a plurality of tap branches with transistor sizes smaller than the main branch, in which previous decisions of the equalizer are mixed with the tap weights using current-mode switching, and a cross coupled latch branch; and a second stage, comprising a comparator module for making decisions based on the outputs of the first stage and a clock input, and a plurality of flip-flops for storing the output of the comparator module.