Controllable-Delay Decision-Feedback Equalizer for Clock-Independent Eye Scans
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Solution Overview
Problem
Existing decision-feedback equalizers (DFE) in high-speed data communication systems face performance degradation due to the dependence on clock edge position, making it challenging to maintain optimal performance during RX eye scans without adjusting the clock edge location.
Innovation Solution
A clock-less decision-feedback equalizer (DFE) utilizing a feedback filter with a controllable delay circuit that generates adjustable feedback signals to cancel post-cursor interference, independent of clock edge positioning, by employing a combining circuit and a feedback filter with a controllable delay circuit to generate and combine input and feedback signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a typical DFE uses clock and data recovery (CDR) to place the clock edge at the data center location, then the DFE performance is optimized, but the device complexity increases and the ease of operation decreases during RX eye scans
Solution Approach 1:
The patent extracts the clock dependency from the DFE architecture by removing the CDR circuitry. The equalizer operates independently of clock edges by using a feedback filter that processes data bits and generates feedback signals based on decision outcomes, eliminating the need for clock synchronization while maintaining equalization performance
Solution Approach 2:
The clock-less DFE uses the data signal itself to drive the equalization process. The feedback filter processes incoming data bits and generates feedback signals based on the decision outcomes, with the data flow itself providing the timing reference rather than an external clock signal
2Measurement precision
If the clock edge location is changed to perform RX eye scan, then the measurement capability is improved, but the DFE performance is degraded
Solution Approach 1:
By removing the clock dependency from the DFE architecture, the patent enables independent adjustment of clock edge location for RX eye scans without affecting equalization performance. The feedback filter continues to operate correctly regardless of clock position, allowing full measurement capability while maintaining optimal DFE performance
Solution Approach 2:
The patent introduces dynamic flexibility by allowing the clock edge location to be freely adjusted during RX eye scans. Since the DFE no longer depends on fixed clock positioning, the system can dynamically change clock timing to perform comprehensive eye diagram measurements across different sampling points
3Stability of the object's composition
If a typical DFE maintains fixed clock edge positioning, then the DFE performance is stable, but the adaptability to varying channel conditions during RX eye scans is reduced
Solution Approach 1:
The clock-less DFE architecture serves multiple functions: it performs equalization for various channel conditions, enables RX eye scans with adjustable clock positioning, and maintains stable performance across different scenarios. The feedback filter structure is universally applicable regardless of clock timing or channel characteristics
Solution Approach 2:
The patent introduces dynamic adaptability by allowing the system to adjust to varying channel conditions without being constrained by fixed clock positioning. The feedback filter can process data bits and generate appropriate feedback signals regardless of when the clock edge occurs, enabling the DFE to adapt to different channel characteristics during RX eye scans
Data Source
AI summary
A decision-feedback equalizer (DFE) includes a combining circuit and a feedback filter. The combining circuit combines an input signal and at least one feedback signal to generate an equalized signal. The feedback filter generates the at least one feedback signal according to the equalized signal, and includes a controllable delay circuit. The controllable delay circuit receives an output signal that is derived from the equalized signal, and applies at least one delay amount to generate at least one delay signal, wherein the at least one feedback signal is derived from the at least one delay signal.