Decision Feedback Equalizer Noise Suppression Slicing
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Solution Overview
Problem
In high loss channels, feedforward equalizers (FFEs) and continuous-time linear equalizers (CTLEs) introduce correlated noise, leading to bit error rate (BER) degradation and increased power usage, while decision feedback equalizers (DFEs) provide post-cursor mitigation but at the cost of high power consumption and additional noise introduction.
Innovation Solution
A DFE is configured for noise suppression slicing, receiving an output signal from a feedforward equalizer and initializing noise suppression slicer parameters, including coefficients and threshold offsets, to update and apply noise suppression based on pre-cursor and post-cursor taps for a subset of received symbols, thereby reducing noise and power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If decision feedback equalizers (DFEs) are used to provide post-cursor mitigation, then signal quality is improved, but power consumption increases and additional noise is introduced
Solution Approach 1:
The equalizer is segmented into two distinct parts: a feedforward equalizer (FFE) that handles pre-cursor interference and a decision feedback equalizer (DFE) that handles post-cursor interference. This segmentation allows each component to be optimized independently, enabling the FFE to operate at lower power while the DFE provides targeted post-cursor mitigation only where needed, rather than requiring the entire equalization system to consume high power.
Solution Approach 2:
The DFE applies post-cursor mitigation selectively to specific signal components rather than uniformly across the entire signal processing chain. By using slicer deferred decisions for certain symbols and hard decisions for others, the system applies different processing qualities locally, reducing overall power consumption while maintaining signal quality where most critical.
2Reliability
If feedforward equalizers (FFEs) and continuous-time linear equalizers (CTLEs) are used, then signal equalization is achieved, but correlated noise is introduced leading to bit error rate degradation
Solution Approach 1:
A noise suppression slicer is introduced as an intermediary component between the FFE and the final decision stage. This slicer estimates and suppresses correlated noise before the signal proceeds to subsequent processing stages. By placing this noise suppression mechanism at the appropriate point in the signal chain, the system maintains the equalization benefits of FFEs and CTLEs while mitigating their harmful correlated noise output.
3Use of energy by moving object
If noise suppression slicing is implemented in DFE, then power consumption is reduced, but processing complexity increases
Solution Approach 1:
The system performs preliminary noise suppression and symbol estimation before the final decision stage. By pre-processing the signal to suppress correlated noise and estimate symbols in advance, the subsequent decision-making process becomes simpler and requires less power. This preliminary action prepares the signal in a state that reduces the complexity of later processing stages.
Solution Approach 2:
The equalizer dynamically adjusts its operation mode based on signal conditions, switching between slicer deferred decisions and hard decisions for different symbols. This dynamic behavior allows the system to optimize power consumption by using simpler hard decisions when signal quality is good and resorting to more complex slicer deferred decisions only when necessary, thereby balancing power consumption and processing complexity adaptively.
Data Source
AI summary
According to an aspect of an embodiment, a decision feedback equalizer (DFE) may be configured for noise suppression slicing. The DFE may be configured to receive, from a feedforward equalizer, an output signal having a received (Rx) symbol. The DFE may be configured to initialize noise suppression slicer (NSS) parameters including one or more initial NSS coefficients and one or more initial slicer deferred decision (SDD) threshold offsets. The DFE may be configured to determine one or more updated NSS coefficients. The DFE may be configured to determine one or more updated SDD threshold offsets. The DFE may be configured to update the NSS parameters of a processing register based on the one or more updated NSS coefficients and the one or more updated SDD threshold offsets.