DFE Resistor Offset Calibration Using an Internal RXOC Clock
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Solution Overview
Problem
Existing resistor offset calibration (RXOC) procedures for static-dynamic random-access memory (SDRAM) face challenges due to large frequency ranges of the write clock (WCK), requiring additional circuits for synchronization and reducing calibration accuracy, especially when WCK frequency is high or low.
Innovation Solution
An internal clock source is introduced in the RXOC circuit, eliminating the need for a CAS command and synchronization states, using a local oscillator to synchronize the DFE-selection component and RXOC control logic, reducing silicon footprint and improving calibration stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an external clock source (WCK) is used for RXOC calibration, then the memory device can operate with standard clocking, but additional synchronization circuits and states are required, increasing device complexity and reducing calibration accuracy
Solution Approach 1:
An internal clock source is introduced as an intermediary between the RXOC control logic and the DFE components. This internal clock source generates a dedicated calibration clock signal that synchronizes the calibration process without requiring external synchronization circuits or CAS commands, thereby improving calibration accuracy while reducing device complexity
Solution Approach 2:
The clocking function is segmented into two independent parts: the main WCK clock for normal memory operations and an internal calibration clock generated by an on-chip oscillator for RXOC calibration. This segmentation allows the calibration process to operate independently with optimized timing, eliminating the need for complex synchronization with the external WCK clock
2Adaptability or versatility
If WCK frequency varies over a large range, then the memory device can adapt to different operating conditions, but calibration accuracy deteriorates at extreme frequencies
Solution Approach 1:
The internal clock source provides a locally optimized clock signal specifically for the RXOC calibration process. This local clocking approach ensures stable and accurate timing for calibration operations regardless of the external WCK frequency, maintaining high calibration accuracy across the full frequency range while allowing the memory device to operate with high adaptability
3Reliability
If CAS command and synchronization states are used for RXOC, then external clock synchronization is maintained, but silicon footprint increases and calibration stability is reduced
Solution Approach 1:
The dependency on external CAS commands and synchronization states is extracted and removed from the RXOC calibration process. The internal clock source independently generates the necessary timing signals, eliminating the need for CAS command sequencing and synchronization state machines, thereby reducing silicon footprint while improving calibration stability
Data Source
AI summary
According to one aspect of the present disclosure, a peripheral circuit is provided. The peripheral circuit may include a DQ circuit comprising a plurality of decision feedback equalization (DFE) components. The peripheral circuit may include a resistor offset calibration (RXOC) circuit. The RXOC circuit may include an oscillator. The oscillator may generate an internal clock source. The RXOC circuit may include a DQ-selection component. The DQ-selection component may select a DFE component of the plurality of DFE components for calibration. The DQ-selection component may output a slicer result signal indicating an offset value received from the DFE component. The RXOC circuit may include control logic. The control logic may send a calibration signal associated with the DFE component to the DQ circuit based on the slicer result signal.