DFE Open Loop Training for DDR Data Buffer ISI Mitigation
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Solution Overview
Problem
Current methods for implementing decision feedback equalization (DFE) in DDR data buffers and registered clock drivers lack a simple and robust implementation, leading to ineffective mitigation of intersymbol interference (ISI) and closure of the received signal eye in computer memory systems.
Innovation Solution
A DFE open loop training method is introduced, utilizing an interface and training circuit to generate training voltages, read output values from an eye monitor slicer, map these values to coefficients, and apply them as feedback to cancel interference, thereby reducing ISI and maintaining signal eye openness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If decision feedback equalization (DFE) is implemented in DDR data buffers and registered clock drivers, then intersymbol interference (ISI) mitigation is improved, but the implementation complexity increases due to lack of defined methods
Solution Approach 1:
The patent applies preliminary action by performing open-loop training before normal operation to pre-determine DFE coefficients. The training circuit generates training patterns, measures channel response, and calculates coefficients in advance, so that when actual data transmission occurs, the pre-computed coefficients are already available for immediate ISI cancellation without adding real-time complexity
Solution Approach 2:
The system performs self-characterization by automatically measuring its own channel response using built-in training circuits and eye monitor slicers. The DFE coefficients are derived from the system's own measured intersymbol interference characteristics, eliminating the need for external calibration equipment or complex manual tuning procedures
2Manufacturing precision
If DFE coefficients are determined through traditional training methods, then signal integrity is improved, but the training process becomes complex and time-consuming
Solution Approach 1:
The patent implements periodic action by structuring the training process as a sequence of periodic steps: generate training pattern, measure eye diagram at specific sampling points, calculate coefficients, and apply them. This periodic structured approach systematically extracts channel characteristics efficiently, achieving accurate coefficient determination in a predictable, time-bounded process rather than through iterative trial-and-error methods
Solution Approach 2:
The training method extracts only the essential information needed for DFE operation by measuring the eye diagram at specific critical sampling points rather than analyzing the entire signal waveform. This selective extraction of key parameters (voltage transition values at specific times) simplifies the training process while maintaining sufficient accuracy for coefficient determination
Data Source
AI summary
An apparatus includes an interface and a training circuit. The interface may be configured to transmit signals to/from a plurality of I/O channels. The training circuit may be configured to generate a training voltage on a current one of the I/O channels, read an output of an eye monitor slicer to determine voltage transition values corresponding to the training voltage at a plurality of sampling times, map the voltage transition values to coefficients for the current I/O channel and determine the coefficients for each of the I/O channels. The training circuit may comprise the eye monitor slicer. The voltage transition values may correspond to an interference response for one of the I/O channels. The coefficients may be applied as feedback to cancel the interference.