DFE VGA Calibration Using DQS Reference to Reduce Input Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increase in operational rate of memory devices leads to increased data errors due to distortion, particularly inter-symbol interference, which can be mitigated by decision feedback equalizers (DFEs), but reliable input signals are necessary to ensure proper DFE functioning, as noise from input signals can lead to unreliable results.
Innovation Solution
Implementing a decision feedback equalizer (DFE) with a variable gain amplifier (VGA) and calibration circuitry that uses reference voltages from a DQS pin instead of a DQ pin to stabilize DC-operating points, reducing noise and improving signal reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the operational rate of memory devices is increased, then productivity is improved, but data errors due to distortion and noise increase
Solution Approach 1:
The patent implements a decision feedback equalizer (DFE) that uses feedback signals from previously received data to compensate for inter-symbol interference in current data reception. The DFE circuit generates correction signals based on past decisions and subtracts the predicted interference from the current received signal, thereby maintaining data reliability at higher operational rates.
Solution Approach 2:
The patent employs a variable gain amplifier (VGA) with adjustable gain controlled by calibration circuitry. The calibration circuit dynamically adjusts the VGA gain parameter based on received signal strength and quality metrics, optimizing the signal-to-noise ratio to maintain reliable data reception as operational rates increase.
2Measurement precision
If a decision feedback equalizer is used to correct inter-symbol interference, then data accuracy is improved, but the requirement for reliable input signals becomes more critical
Solution Approach 1:
The patent implements calibration circuitry that performs preliminary adjustment of the variable gain amplifier parameters before the DFE processes the data signals. This preliminary calibration ensures that the input signals to the DFE are already optimized for quality, preventing noise from compromising the equalization process.
Solution Approach 2:
The variable gain amplifier acts as an intermediary between the received signal and the DFE circuit. It condition the input signal by adjusting its gain to optimal levels, ensuring that the DFE receives clean, reliable signals for accurate equalization processing.
3Reliability
If calibration circuitry is implemented to stabilize DC-operating points, then signal reliability is improved, but device complexity increases
Solution Approach 1:
The patent integrates the calibration circuitry and variable gain amplifier control logic within the existing memory device architecture, merging multiple functions into a unified structure. The calibration circuit is combined with the VGA control mechanism, allowing both functions to share common circuit elements and control pathways, thereby reducing overall complexity.
Solution Approach 2:
The calibration circuitry operates autonomously to self-adjust the VGA parameters and stabilize DC-operating points without requiring external intervention. The system automatically monitors signal quality and performs real-time calibration, eliminating the need for complex external calibration equipment or manual adjustment mechanisms.
Data Source
AI summary
A device, includes an amplifying device that when in operation transmits a data signal and a reference signal to a decision feedback equalizer (DFE) circuit. The amplifying device includes a variable gain amplifier (VGA) that when in operation generates the reference signal as having a predetermined gain relative to a received input signal and a continuous-time linear equalizer (CTLE) that operates to mitigate inter-symbol interference (ISI) on the data signal from a data stream comprising the data signal. The device also includes compensation circuitry coupled to the amplifying device, wherein the compensation circuitry when in operation calibrates the amplifying device by adjusting a voltage level of the data signal based upon a data strobe (DQS) signal.