DFT Circuit for BTI Stress Testing
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Solution Overview
Problem
Current methods for evaluating bias temperature instability (BTI) effects in semiconductor integrated circuits are inadequate, as they only allow for the collection of limited measurement data and lack effective on-chip observation capabilities, making it difficult to determine the cause of device function failures.
Innovation Solution
A design-for-test circuit with multiple stress generators that apply varying stress signals to PMOS and NMOS transistors, allowing for multiple stress times within a single test time, enabling comprehensive evaluation of BTI effects and identifying failure causes through on-chip stress testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a single stress time is applied to evaluate BTI effect, then the test procedure is simple, but the amount of measurement data collected is insufficient
Solution Approach 1:
The stress generation circuit is divided into multiple stress generators (first stress generator, second stress generator, etc.), each capable of independently applying stress signals with different stress times to different devices under test. This segmentation allows simultaneous collection of multiple measurement data points with different stress conditions, resolving the contradiction between data quantity and test complexity.
Solution Approach 2:
Each stress generator is designed as a multi-functional unit that can generate various stress signals (different voltage levels, different stress times) to evaluate BTI effects under multiple conditions. This universal design enables a single test procedure to collect comprehensive measurement data across different stress parameters, increasing data quantity without proportionally increasing overall test complexity.
2Loss of information
If conventional stress testing is performed without on-chip observation, then the test setup is simple, but the ability to determine failure causes is insufficient
Solution Approach 1:
Observation circuits are introduced as intermediary components between the stress generators and the devices under test. These observation circuits enable real-time monitoring of device states during stress testing, capturing intermediate measurement data that provides critical information for failure analysis. The intermediary observation capability resolves the contradiction by adding information gathering without requiring complete redesign of the test system.
Solution Approach 2:
The test circuit incorporates feedback mechanisms where measurement data from devices under test is fed back to control and analysis systems. This feedback loop enables real-time adjustment of stress parameters and provides continuous information about device degradation, significantly improving failure cause determination while maintaining manageable test circuit complexity through automated control.
3Reliability
If long stress time is applied to evaluate BTI effect, then the evaluation is comprehensive, but the test duration is excessive
Solution Approach 1:
The test system applies periodic stress signals through multiple stress generators with different duty cycles and frequencies. By using periodic action with varying parameters, the system can evaluate BTI effects comprehensively across different stress durations within a single test cycle, achieving reliable evaluation without requiring excessively long continuous stress application.
Solution Approach 2:
Multiple stress generators operate simultaneously and continuously with different stress time parameters, ensuring that useful testing action is maintained across all devices at all times. This continuous parallel testing eliminates idle time between sequential tests, achieving comprehensive BTI evaluation across multiple stress conditions without proportionally increasing total test duration.
Data Source
AI summary
A design-for-test circuit for evaluating a BTI effect is disclosed, the DFT circuit comprises a plurality of stress generators having logic circuits with a plurality of input and output terminals. Each output terminal is connected to the grid of the device to be tested. In a stress mode, a stress input signal is selected from a frequency signal, a first direct current voltage, and a second direct current voltage, all stress output signals formed by all the stress generators comprise the first direct current voltage, a series of frequency signals with different duty cycles, and the second direct current voltage, and all the stress output signals are used in combination such that the stress times regarding the device under test within the same test time have a plurality of different values, so as to evaluate the BTI effect of the device under test having different values of the stress times.