Diagnostic Test Pattern Generation for Small Delay Defects

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current diagnostic test pattern generation methods are inadequate for detecting and isolating small delay defects in integrated circuits, as they often fail to activate long paths required for detecting these defects, leading to low diagnosis resolution and missed defects.

Innovation Solution

The method involves identifying a plurality of long paths passing through diagnosis suspects using criteria such as Standard Delay Format timing information and the number of logic gates, and generating test patterns to activate these paths, thereby improving the detection and isolation of small delay defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If test patterns are generated using transition delay fault model with shorter paths, then ATPG run time and pattern counts are minimized, but small delay defects may not be detected because the paths are too short for delay effects to be observed

Engineering Contradiction:
ImproveATPG run time and pattern countsVSAvoiddetection of small delay defects
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent dynamically adjusts the path selection strategy based on the type of defect being tested. For small delay defects, it switches to activating longer paths that allow delay effects to propagate, whereas for larger defects, shorter paths suffice. This dynamic adaptation resolves the contradiction by making the test generation process flexible rather than static.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the critical parameter for path selection from minimal path length (for efficiency) to sufficient path length (for detection sensitivity). By adjusting the path length parameter based on the defect size category, the system achieves both efficient test generation and reliable defect detection.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If path delay fault model is used to test cumulative delay effects along specific paths, then small delay defects along tested paths can be detected, but the number of paths grows exponentially with circuit size limiting the fraction of paths that can be targeted

Engineering Contradiction:
Improvedetection of small delay defectsVSAvoidnumber of paths to be tested
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of uniformly testing all paths or using a single test strategy, the patent applies local quality by differentiating path selection based on local defect characteristics. It identifies and targets specific paths that are relevant to small delay defects while ignoring paths that are not critical, thereby managing complexity through selective focus.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent extracts and isolates the critical subset of paths that are most relevant for detecting small delay defects, separating them from the exponential set of all possible paths. This extraction approach allows the system to manage complexity by focusing computational resources on the essential paths rather than attempting to test everything.

Inventive Principle:
Principle #2Taking out (Extraction)

3Device complexity

If only a limited number of critical paths are targeted with path delay fault model, then test complexity is reduced, but diagnosis resolution remains low because each failure is associated with a large number of defect suspects

Engineering Contradiction:
Improvetest complexityVSAvoiddiagnosis resolution
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent segments the diagnosis process into multiple stages: initial defect detection, path-specific defect isolation, and suspect refinement. By dividing the diagnostic workflow into segments that progressively narrow down suspects, it achieves high diagnosis resolution without requiring exhaustive testing of all paths.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by testing only the necessary subset of paths required to achieve sufficient diagnosis resolution, rather than testing all possible paths. This partial testing approach provides adequate diagnostic information while maintaining manageable test complexity.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8527232B2Diagnostic test pattern generation for small delay defect
Publication Date: 2013.09.03 SIEMENS INDUSTRY SOFTWARE INC
  • US8527232B2 patent drawing
  • US8527232B2 patent drawing
  • US8527232B2 patent drawing

AI summary

Methods of diagnostic test pattern generation for small delay defects are based on identification and activation of long paths passing through diagnosis suspects. The long paths are determined according to some criteria such as path delay values calculated with SDF (Standard Delay Format) timing information and the number of logic gates on a path. In some embodiments of the invention, the long paths are the longest paths passing through a diagnosis suspect and reaching a corresponding failing observation point selected from the failure log, and N longest paths are identified for each of such pairs.