Diagonal Column Storage in 3D Cross-Point Memory

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Solution Overview

Problem

Existing memory technologies face challenges in efficiently performing column reads, particularly in reducing delay times and simplifying media management, especially when dealing with large volumes of data and error correction codes.

Innovation Solution

The solution involves physically storing an array of bits diagonally across multiple physical rows and columns in a three-dimensional cross-point memory, allowing for parallel read operations across multiple dies, which reduces the number of physical rows needed and simplifies media management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If data is stored in traditional row-major or column-major format in memory, then data can be accessed by rows or columns, but column read operations experience significant delay times and complex media management when dealing with large volumes of data

Engineering Contradiction:
Improvecolumn read delay timeVSAvoidmedia management complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent applies dimensionality change by storing data in a three-dimensional cross-point memory structure instead of traditional two-dimensional row-major or column-major formats. This 3D architecture enables diagonal column storage across multiple dies, allowing parallel read operations that significantly reduce column read delay times while simplifying media management through the inherent structure of the cross-point memory array.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the memory system into multiple dies, with each die containing a portion of the data array. This segmentation allows parallel access to different segments simultaneously, reducing overall read delay. The diagonal column storage strategy further segments data across physical rows and columns in a way that enables efficient parallel read operations without complex media management.

Inventive Principle:
Principle #1Segmentation

2Productivity

If multiple bits per column are read in parallel from three-dimensional cross-point memory, then memory performance improves, but the number of physical rows needed increases

Engineering Contradiction:
Improvememory read throughputVSAvoidnumber of physical rows
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent merges multiple bits per column into parallel read operations from the three-dimensional cross-point memory. By combining multiple bit lines and word lines in the 3D structure, the system can read multiple bits simultaneously without proportionally increasing the number of physical rows, as the vertical stacking in 3D memory allows multiplexing of read paths.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The transition to three-dimensional memory architecture provides an additional spatial dimension for organizing data, allowing multiple bits to be accessed in parallel without linearly increasing the footprint in the row dimension. The 3D structure enables vertical integration of multiple memory layers, effectively increasing capacity and parallelism without proportional increases in physical row count.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of operation

If diagonal column storage is implemented across multiple dies, then parallel read operations are enabled and media management is simplified, but the memory architecture becomes more complex

Engineering Contradiction:
Improvemedia management easeVSAvoidmemory architecture complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The three-dimensional cross-point memory architecture provides multi-functionality by supporting both diagonal column storage and traditional row/column access patterns. This universal structure enables parallel read operations and simplified media management for diagonal columns while maintaining compatibility with conventional memory access methods, reducing the operational complexity despite the advanced architecture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12293107B2Method and apparatus to perform a multiple bit column read using a single bit per column memory accessible by row and/or by column
Publication Date: 2025.05.06 INTEL CORP
  • US12293107B2 patent drawing
  • US12293107B2 patent drawing
  • US12293107B2 patent drawing

AI summary

A memory accessed by rows and/or by columns in which an array of bits can be physically stored physical one-bit wide columns with each bit of the multi-bit wide logical column stored in a one-bit physical column in a different physical die. The multi-bit column is read by reading a one-bit physical column in each of the different physical die in parallel. The multi-bit wide logical column is arranged diagonally across M physical rows and M one-bit physical columns with each bit of the multi-bit wide logical column in the logical row stored in a different physical row and physical one-bit wide column in one of plurality of dies.