Diagonal Lead IC Package Layout for High-Voltage Creepage
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Solution Overview
Problem
Integrated circuit (IC) packages with reduced feature sizes face challenges in meeting voltage isolation requirements such as creepage and clearance, particularly in pollution degree categories, due to limitations in existing galvanic isolation techniques.
Innovation Solution
The design incorporates a transformer with diagonalized lead configurations and coils connected to semiconductor dies, providing magnetic coupling while ensuring galvanic separation, allowing for reduced package size while maintaining or exceeding minimum creepage distances, thus meeting safety standards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lead configurations are used in IC packages, then manufacturing and assembly are simplified, but voltage isolation requirements (creepage and clearance) cannot be met in reduced feature size designs
Solution Approach 1:
The patent applies asymmetry by positioning lead sets at non-traditional, asymmetric locations on the package body. Specifically, lead sets are positioned at opposite corners or edges of the package rather than symmetrically, creating asymmetric creepage paths that maximize isolation distances while accommodating reduced feature sizes.
Solution Approach 2:
The patent utilizes three-dimensional space by extending leads from multiple faces of the package body rather than confining them to a single plane. This dimensional approach allows leads to be positioned at opposite corners or edges of the rectangular package, maximizing creepage and clearance distances in multiple spatial directions simultaneously.
2Area of stationary object
If feature sizes are reduced to shrink package footprint, then cost and manufacturing efficiency improve, but meeting minimum creepage distances becomes difficult
Solution Approach 1:
The patent transitions from two-dimensional planar lead arrangement to three-dimensional positioning by extending leads from opposite corners or edges of the rectangular package body. This allows maximum creepage distances to be achieved in the diagonal dimension while maintaining a compact footprint, effectively utilizing the Z-dimension and diagonal space.
Solution Approach 2:
The patent segments the package into distinct functional zones by positioning lead sets at opposite corners or edges, creating well-separated regions for different voltage potentials. This segmentation maximizes the isolation distance between leads while maintaining a compact overall package size.
3Reliability
If leads are positioned to maximize voltage isolation, then safety standards are met, but package design complexity and manufacturing difficulty increase
Solution Approach 1:
The patent employs asymmetric lead positioning at opposite corners or edges of the package body, which maximizes creepage and clearance distances for reliable voltage isolation. This asymmetric configuration is integrated into the molding process, allowing the complex geometry to be manufactured as a single integrated component rather than requiring complex post-processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables IC packages to meet stringent voltage isolation requirements, allowing for smaller footprint designs that reduce costs and improve manufacturing efficiency while ensuring safety and performance.
Implementation Method 1
Various transmission techniques are available for signals to be sent across galvanic isolation barriers including optical, capacitive, and magnetic coupling techniques. Magnetic coupling typically relies on use of a transformer to couple, yet galvanically separate, circuits on the different sides of the transformer
Implementation Method 2
Galvanic isolation typically includes electrical isolation coupled with lack of direct electrical contact between the circuit components
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 3
AI summary
Aspects of the present disclosure include systems, structures, circuits, and methods providing integrated circuit (IC) packages or modules having diagonalized leads. First and second semiconductor dies are disposed on a substrate. First and second coils are configured on the substrate for a transformer. The transformer may include a core. The leads or pins may be aligned along a diagonal of the package body, providing increased creepage. The IC packages and modules may include various types of circuits; in some examples, IC packages or modules may include a galvanically isolated gate driver or other high voltage circuit.