Diagonal Torus Network Routing for Higher NoC Bandwidth
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Solution Overview
Problem
Integrated circuit (IC) devices face bandwidth limitations and inefficiencies in Network on Chip (NoC) designs due to a limited number of channels per device, leading to strain on throughput and increased power consumption, particularly in applications requiring higher bandwidth.
Innovation Solution
Implementing a diagonal routing mesh overlayed on a grid mesh in NoC devices, which includes horizontal/vertical channels and additional diagonal channels to enhance communication pathways, allowing for increased bandwidth and reduced transmission latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a limited number of channels per device is used in NoC design, then device complexity is reduced, but bandwidth and throughput are limited
Solution Approach 1:
The patent introduces diagonal routing paths in addition to traditional horizontal and vertical channels, adding a new dimensional approach to communication pathways. This allows processing nodes to communicate through diagonal channels that cut across the traditional grid, effectively increasing the available communication capacity without adding more traditional channels, thus resolving the contradiction between channel quantity and bandwidth.
2Device complexity
If a limited number of channels per device is used in NoC design, then device complexity is reduced, but throughput is strained
Solution Approach 1:
The patent implements dynamic routing where processing nodes can dynamically select between horizontal, vertical, and diagonal channels based on real-time communication needs and network conditions. This dynamic adaptability allows the system to optimize throughput by utilizing diagonal channels for direct communication when needed, while maintaining simple channel configurations through software-controlled routing decisions.
3Ease of operation
If traditional grid mesh routing is used, then routing simplicity is maintained, but transmission latency increases
Solution Approach 1:
By adding diagonal routing dimensions to the traditional two-dimensional grid mesh, the patent creates a three-dimensional routing space that allows direct diagonal communication between nodes. This reduces the number of hops and transmission steps required, thereby decreasing transmission latency while maintaining relatively simple routing logic through extended directional channels.
4Quantity of substance
If additional diagonal channels are added to the mesh, then bandwidth is improved, but device complexity increases
Solution Approach 1:
The patent merges diagonal channels with the existing horizontal and vertical channel structures into a unified channel system. Rather than creating separate independent channel networks, the diagonal channels are integrated into the grid mesh framework, sharing similar routing control mechanisms and processing node interfaces. This merging approach increases communication capacity while minimizing the additional complexity compared to implementing entirely separate communication infrastructure.
Data Source
AI summary
A device is disclosed that includes multiple channels and multiple processing nodes. Each processing node includes input/output (I/O) ports coupled to the channels and channel control modules coupled to the I/O ports. Each processing node is configured to select, by the channel control module in a first operation, a first I/O port of the I/O ports; communicate a first message, via the first I/O port, to a first processing node over a first channel or a second processing node over a second channel orthogonal to the first channel in a logic representation; select, by the channel control module in a second operation, a second I/O port of the I/O ports; and communicate a second message, via the second I/O port, to a third processing node over a third channel extending in a diagonal direction and non-orthogonal to the first and second channels in the logic representation.