Diagonal-Via Interposer for Warped IC Test Contact Alignment

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Solution Overview

Problem

Existing test systems for integrated circuit devices face challenges due to mechanical irregularities and thermal expansion, leading to substrate warping and unreliable contact, which are exacerbated by the need to adapt to new form factors and geometries, making reliable and cost-effective testing difficult.

Innovation Solution

An interposer with angled vias and individual anisotropic conductive pillars is used to translate and resize contact geometries between the device under test and the test board, minimizing series resistance and phase shift, and ensuring reliable connectivity despite mechanical imperfections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple semiconductor components are assembled side by side across a large substrate, then device capability and volumetric efficiency are improved, but mechanical flatness deteriorates due to thermal expansion stress causing substrate warping

Engineering Contradiction:
Improvedevice capabilityVSAvoidsubstrate flatness
Core Design Contradiction:
Adaptability or versatilityVSShape

Solution Approach 1:

The patent introduces a curved or contoured interposer that matches the warpage profile of the multi-chip module, transforming the 3D warpage issue into a 2D contact plane problem. This dimensional transformation allows the interposer to conform to the warped substrate while maintaining flat contact surfaces for reliable electrical connection.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The interposer serves as an intermediary component between the warped multi-chip module and the test substrate. It absorbs the mechanical stress and warpage through its own contoured design, providing a stable intermediate platform that ensures reliable electrical contact without transmitting mechanical irregularities to the test equipment.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If contact springs are used to manage vertical position variation from substrate warping, then contact reliability is improved, but device lifetime deteriorates due to quick wear and limited lifetime of contact springs

Engineering Contradiction:
Improvecontact reliabilityVSAvoidcontact spring lifetime
Core Design Contradiction:
ReliabilityVSDuration of action of moving object

Solution Approach 1:

The patent replaces the mechanical contact spring system with a rigid interposer structure that provides stable electrical contact through precise geometric matching rather than elastic deformation. This substitution eliminates the wear mechanisms inherent in spring-based contact systems, dramatically extending the duration of action.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The interposer changes the contact parameters from elastic deformation (springs) to rigid geometric matching. By controlling the geometry and material properties of the interposer, the system achieves reliable contact without the wear and fatigue issues associated with repeated compression and relaxation of contact springs.

Inventive Principle:
Principle #35Parameter changes

3Stability of the object's composition

If pogo-pins are used to deal with vertical positional uncertainty, then contact stability is improved, but device complexity and cost increase due to damage susceptibility and service difficulty

Engineering Contradiction:
Improvecontact stabilityVSAvoidtest system complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The interposer acts as a protective intermediary that absorbs mechanical misalignment and warpage, eliminating the need for fragile pogo-pins. This simplifies the overall test system by removing the complex spring-loaded pin mechanism while maintaining contact stability through geometric matching.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Ease of manufacture

If existing test setups are reused for new form factor devices, then cost-effectiveness is improved, but manufacturing precision deteriorates due to contact point geometry mismatches

Engineering Contradiction:
Improvecost-effectivenessVSAvoidcontact point geometry matching
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The interposer changes the geometric parameters of contact points through its contoured design, allowing adaptation between different device form factors. By varying the interposer geometry rather than the test equipment, the system maintains manufacturing precision while reusing existing expensive test setups, improving cost-effectiveness.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides durable and predictable connectivity, reducing wear and improving testing performance by accommodating mechanical distortions and allowing reuse of existing test setups, thus enhancing reliability and efficiency.

Implementation Method 1

diagonal vias which are routed between corresponding contact points on the adapter or interposer and are drilled at an angle to the plane of the interposer substrate

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

This allows the transformation of the contact geography of the device under test to be translated or transformed to match the contact geography present on the test board

Methodology Applied
Scientific EffectGeometric transformation: Geometry

Data Source

PatentUS20250321267A1Versatile interposer with diagonal VIAS for testing of integrated circuit devices
Publication Date: 2025.10.16 ESSAI INC
  • US20250321267A1 patent drawing
  • US20250321267A1 patent drawing
  • US20250321267A1 patent drawing

AI summary

High density packaging of multiple semiconductor devices creates very large packages that are demanding to test reliably. The fabrication process causes imperfections such as distortion due to differential thermal expansion rates of attached parts. The loss of flatness creates a problem for reliable connectivity in a test environment leading to frequent wear in test receptacles. A novel approach to mitigate connection uncertainties offers greater reliability with much reduced down time for maintenance.