Monolithic Diamond Capacitor Structure for High-Voltage Stability
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Solution Overview
Problem
High-voltage capacitor devices face premature failure and mechanical stress due to increased dielectric thickness, leading to cracks and electrostatic field concentrations, which compromise reliability and capacitance density.
Innovation Solution
A monolithic diamond region with a dislocation density between 10^5 to 10^9 cm^-2, doped with p-type impurities and a deep level n-type dopant, is used to form a capacitor structure that minimizes thermomechanical stress and passivates dislocations, ensuring robustness and constant capacitance against voltage and temperature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the dielectric layer thickness is increased to sustain the operating electrical field, then the breakdown voltage is improved, but mechanical stress increases leading to cracks and delamination
Solution Approach 1:
The patent changes the material parameter from conventional silicon-based dielectric to diamond, which has superior mechanical strength and thermal conductivity. This allows the dielectric layer to withstand higher mechanical stress without cracking or delaminating, while maintaining the ability to sustain high breakdown voltages through optimized thickness
Solution Approach 2:
The patent employs a composite structure combining diamond dielectric layer with metal electrodes (such as tungsten or copper). This composite approach leverages the exceptional mechanical properties of diamond to resist stress-induced failures while maintaining electrical performance, solving both the reliability and strength contradictions simultaneously
2Reliability
If the dielectric layer thickness is increased to sustain operating electrical field, then the breakdown voltage is improved, but capacitance density decreases
Solution Approach 1:
The patent uses diamond as the dielectric material in a composite capacitor structure. Diamond's exceptional properties allow optimization of the thickness parameter to simultaneously achieve high breakdown voltage and maintain high capacitance density, resolving the contradiction between reliability and quantity
Solution Approach 2:
The patent optimizes the dielectric thickness parameter within a specific range, leveraging diamond's high breakdown field strength to maintain adequate voltage margins while keeping the thickness sufficient to ensure high capacitance density through the relationship C = εA/d
3Reliability
If homoepitaxy or HPHT techniques are used to limit dislocation density in diamond, then the leakage current is reduced, but industrialization and wafer compatibility are compromised
Solution Approach 1:
The patent optimizes the dislocation density parameter to a specific range (10^5 to 10^9 cm^-2) that balances electrical performance and manufacturability. This parameter optimization allows using more industrially compatible growth techniques while maintaining acceptable leakage current levels through subsequent processing steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution prevents delamination, reduces leakage currents, and maintains capacitance stability under high voltages, making it suitable for industrialization and high-voltage applications without inducing additional mechanical stress.
Implementation Method 1
the intermediate layer is doped with a deep level dopant of type n that passivates the dislocations of the intermediate layer
Implementation Method 2
A monolithic diamond region with a dislocation density between 10^5 to 10^9 cm^-2, doped with p-type impurities and a deep level n-type dopant, is used to form a capacitor structure that minimizes thermomechanical stress
Implementation Method 3
ensuring robustness and constant capacitance against voltage and temperature
Data Source
AI summary
An electrical device that includes a capacitor with a monolithic diamond region having: a diamond substrate; a first electrode layer on the diamond substrate; an intermediate layer on the first electrode layer having a dislocation density comprised between 105.cm −2 to 109.cm−2; and a second electrode layer on the intermediate layer, wherein the first electrode layer and the second electrode layer are doped with p-type impurities and the intermediate layer is doped with a deep level dopant of type n that passivates the dislocations of the intermediate layer, such that the capacitor is formed by the monolithic diamond region between the stack formed by the first electrode layer and the second electrode layer separated by the intermediate layer.