Diblock Copolymer Self-Assembly for Semiconductor Patterning

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Solution Overview

Problem

Conventional photolithography processes face challenges in patterning semiconductor integrated circuit features as geometry sizes decrease, leading to issues with pattern uniformity and feature alignment, making it difficult to achieve complex and smaller circuit designs.

Innovation Solution

A method involving the use of self-assembling nano-sized features formed by diblock copolymers, where a polymer layer with specific components is treated to separate and create openings that are then extended into the substrate, guided by a patterned mask to improve alignment and pattern uniformity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional photolithography processes are used to pattern IC features, then the manufacturing process is relatively simple, but the manufacturing precision deteriorates as geometry size decreases

Engineering Contradiction:
Improvepattern uniformity and feature alignmentVSAvoidprocessing complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The diblock copolymer system performs self-assembly to automatically form the desired nanoscale patterns without requiring complex external guidance. The polymer components spontaneously organize into periodic structures based on their inherent incompatibility and interfacial energy minimization, eliminating the need for sophisticated photolithography alignment processes

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent changes the fundamental parameter from optical wavelength limitations to nanoscale self-organization length scales. By controlling polymer chain length, composition, and annealing conditions, the system achieves pattern dimensions and uniformity that are insensitive to the optical resolution limits that constrain conventional photolithography

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If geometry size is scaled down to create smaller circuits, then functional density increases, but manufacturing precision deteriorates due to photolithography limitations

Engineering Contradiction:
Improvenumber of interconnected devices per chip areaVSAvoidpattern uniformity
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent transitions from two-dimensional planar photolithography patterning to three-dimensional self-assembled polymer structures. The vertical dimension of the polymer film thickness and the three-dimensional phase separation morphology enable pattern formation at length scales and with uniformity that cannot be achieved through conventional planar optical methods

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The use of diblock copolymers as a composite material system combines two incompatible polymer segments that self-organize into periodic nanostructures. This composite approach creates inherent length scales and pattern uniformity that single-material photolithography cannot achieve at comparable dimensionality

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of accurately aligned and uniform nano-sized features, facilitating the creation of complex semiconductor device patterns without the limitations of traditional photolithography, thereby enhancing the fabrication of smaller and more intricate semiconductor circuits.

Implementation Method 1

self-assembling a nano-sized feature using a portion of the polymer layer

Methodology Applied
Scientific EffectSelf-assembly: Self-Assembly

Implementation Method 2

treating the polymer layer to facilitate a separation of the first and second components

Methodology Applied
Scientific EffectPhase separation:

Implementation Method 3

treating the polymer layer to facilitate a separation of the first and second components

Methodology Applied
Scientific EffectPhase separation:

Implementation Method 4

wherein an interfacial energy exists between the material layer and the polymer layer; transforming the polymer layer into a mask that has a predetermined structure that is associate with the interfacial energy

Methodology Applied
Scientific EffectInterfacial energy: Surface Tension

Data Source

PatentUS8497201B2Self-assembly pattern for semiconductor integrated circuit
Publication Date: 2013.07.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8497201B2 patent drawing
  • US8497201B2 patent drawing
  • US8497201B2 patent drawing

AI summary

A method of fabricating a semiconductor device is provided which includes providing a substrate. A material layer is formed over the substrate. A polymer layer is formed over the material layer. A nano-sized feature is self-assembled using a portion of the polymer layer. The substrate is patterned using the nano-sized feature.