Semiconductor Die Attach Using Boundary Features for Bond Line Thickness
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Solution Overview
Problem
The existing die attach processes in semiconductor manufacturing face challenges in achieving consistent bond strength and minimizing voids, which can lead to mechanical and electrical failures due to the limited bond line thickness and potential displacement of conductive material, resulting in increased stress and strain on the die.
Innovation Solution
The use of boundary features on the die pad to contain and increase the thickness of conductive material, allowing for a higher bond line thickness and preventing material displacement, thereby enhancing the durability and performance of semiconductor devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the thickness of conductive material is increased to achieve higher bond line thickness, then the shear stress on the die is decreased, but the conductive material may flow to other portions of the leadframe or die, causing moisture paths, short circuits, and wire bonding problems
Solution Approach 1:
The patent applies local quality by creating a non-uniform distribution of conductive material through controlled dispensing patterns and using spankers to locally compress and reshape the material. This allows thicker material to be placed in specific areas (under the die) while preventing excessive material from flowing to unwanted areas, thus achieving high bond line thickness without causing short circuits or moisture paths.
Solution Approach 2:
The patent uses spankers to perform preliminary action by compressing and reshaping the conductive material before the die is fully attached. This preliminary compression prevents the material from flowing outward during the bonding process, allowing thicker material to be used without causing displacement to other portions of the leadframe or die.
2Manufacturing precision
If a spanker is used to flatten the conductive material during die attach, then the bond line thickness can be controlled, but the fabrication process becomes longer, less productive, and more expensive
Solution Approach 1:
The patent applies partial action by using spankers selectively only in areas where precise bond line thickness control is critical, rather than flattening the entire conductive material layer. This selective approach maintains manufacturing precision where needed while reducing process time and cost compared to complete flattening operations.
3Strength
If too much conductive material is used to achieve high bond line thickness, then the bond strength is improved, but the conductive material is displaced by the spanker from the die pad to other portions of the leadframe, causing short-circuits and other problems
Solution Approach 1:
The spanker performs preliminary compression of the conductive material before die attachment, preventing material displacement during bonding. This preliminary action allows excessive material to be contained and properly positioned, maintaining bond strength while preventing short-circuits caused by material displacement to other portions of the leadframe.
Solution Approach 2:
The patent creates local quality by concentrating conductive material precisely where needed (under the die pad) through controlled dispensing and spanker compression. This ensures that even with large amounts of material used, the material remains localized to the bond area rather than dispersing to cause harmful short-circuits.
Data Source
AI summary
Die attach methods used in making semiconductor devices and the semiconductor devices resulting from those methods are described. The methods include providing a leadframe with a die attach pad, using boundary features to define a perimeter on the die pad, depositing a conductive material (such as solder) within the perimeter, and then bonding a die containing an integrated circuit to the die pad by using the conductive material. The boundary features allow an increased thickness of conductive material to be used, resulting in an increased bond line thickness and increasing the durability and performance of the resulting semiconductor device.