Semiconductor Die Attach Structure for Edge Stress Relief
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Solution Overview
Problem
In the packaging process of memory thin die stacks, the direct contact between the die, adhesive layer, and solder mask on the substrate leads to stress concentration, causing cracks during bending, deformation, or temperature cycling reliability detection.
Innovation Solution
A semiconductor structure is designed with a substrate having an insulation layer, a die arranged on the insulation layer via a first adhesive layer, and at least one hole slot in the insulation layer corresponding to the edge of the first adhesive layer, filled with a second adhesive layer having a lower elasticity modulus than the first adhesive layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the die and substrate are designed thinner and thinner, then the packaging process can accommodate thin die stack requirements, but stress concentration occurs at the edge position causing die crack or substrate crack
Solution Approach 1:
The patent applies local quality by creating a hole slot at the specific edge position where stress concentration occurs, and filling it with a buffer adhesive layer having different elasticity modulus. This localized structural modification addresses the stress concentration problem at the critical edge region without changing the overall thin substrate design, thereby maintaining both thinness and reliability.
Solution Approach 2:
The buffer adhesive layer is pre-placed in the hole slot at the edge position before die mounting. This beforehand cushioning provides stress relief and prevents crack initiation at the vulnerable edge position, allowing the substrate to withstand bending and temperature cycling without failure.
2Adaptability or versatility
If the die bends itself or deforms due to external force, then the die can adapt to packaging requirements, but stress concentration at the edge position causes die crack or substrate crack
Solution Approach 1:
The buffer adhesive layer is specifically placed at the edge position where stress concentration occurs during die bending or deformation. This localized soft layer provides stress relief exactly where needed, allowing the die to deform adaptively without causing cracks at the vulnerable edge positions.
Solution Approach 2:
The buffer adhesive layer acts as an intermediary between the rigid die and substrate at the edge position. When the die bends or deforms, this intermediate layer absorbs and distributes the stress, preventing direct stress transfer that would cause cracking at the edge position.
3Reliability
If the die undergoes temperature cycling reliability detection, then the reliability can be verified, but stress concentration at the edge position causes die crack or substrate crack
Solution Approach 1:
The buffer adhesive layer is strategically placed at the edge position where stress concentration occurs during temperature cycling. This localized modification provides stress relief exactly where thermal expansion and contraction create the most stress, enabling successful temperature cycling reliability detection without edge cracking.
Solution Approach 2:
The buffer adhesive layer converts the harmful stress concentration effect into a beneficial stress distribution pattern. During temperature cycling, the soft buffer layer at the edge position absorbs thermal stress, transforming what would be a crack-inducing stress concentration into a stress-relieving mechanism that verifies reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design optimizes stress distribution at the edge where the die is connected to the substrate, preventing cracks during bending or deformation, and enhancing the reliability of the semiconductor structure.
Implementation Method 1
an elasticity modulus of the second adhesive layer is smaller than an elasticity modulus of the first adhesive layer
Data Source
Figure 1~4
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Figure 8~10
AI summary
The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate, a die and a first adhesive layer; a surface of the substrate is provided with an insulation layer; the die is arranged on a surface of the insulation layer via the first adhesive layer; the insulation layer is provided with at least one hole slot; a position of the at least one hole slot corresponds to at least a part of an edge of the first adhesive layer; a second adhesive layer is arranged in the at least one hole slot; at least a part of a surface of the second adhesive layer is connected with the first adhesive layer; and an elasticity modulus of the second adhesive layer is smaller than an elasticity modulus of the first adhesive layer.